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  ? products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by micron without notice. products are only warranted by micron to meet micron?s production data sheet specifications. 09005aef8136743e pdf/09005aef8136761e zip MT9M111__soc1310__1.fm - rev. c 10/04 en 1 ?2004 micron technology, inc. all rights reserved. MT9M111 soc megapixel digital image sensor preliminary ? 1/3-inch soc megapixel cmos digital image sensor MT9M111i29stc (micron part number) features ? digitalclarity cmos imaging technology  system-on-a-chip (soc)?completely integrated camera system  ultra-low power, low cost, progressive scan cmos image sensor  superior low-light performance  on-chip image flow processor (ifp) performs sophisticated processing: color recovery and correction sharpening, gamma, le ns-shading correction on-the-fly defect correction  filtered image downscaling to arbitrary size with smooth, continuous zoom and pan  automatic features: auto exposure, auto white balance (awb), auto black reference (abr), auto flicker avoidance, auto color saturation, auto defect identification and correction  fully automatic xenon and led-type flash support fast exposure adaptation  multiple parameter contexts easy/fast mode switching  camera control sequencer automates: snapshots snapshots with flash video clips simple two-wire serial programming interface  itu-r bt.656 (ycbcr), 565rgb, 555rgb, or 444rgb formats (progressive scan)  raw and processed bayer formats  output fifo and integer clock divider: ?uniform? pixel clocking applications  cellular phones pdas toys  other battery-powered products table 1: key performance parameters parameter typical value optical format 1/3-inch (5:4) active imager size 4.6mm(h) x 3.7mm (v), 5.9mm diagonal active pixels 1,280h x 1,024v pixel size 3.6m x 3.6m color filter array rgb bayer pattern shutter type electronic rolling shutter (ers) maximum data rate/ maximum master clock 27 mps/54 mhz frame rate sxga (1,280 x 1,024) 15 fps at 54 mhz qsxga (640 x 512) 30 fps at 54 mhz adc resolution 10 bit, dual on-chip responsivity 1.0 v/lux-sec (550nm) dynamic range 71db snr max 44db supply voltage i/o digital 1.7v?3.6v core digital 2.5v?3.1v analog 2.5v?3.1v power consumption 170mw sxga at 15 fps (54 mhz clkin) 90mw qsxga at 30 fps (54 mhz low-power mode) operating temperature -30c to +70c packaging 44-ball icsp wafer or die
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310toc.fm - rev. c 10/04 en 2 ?2004 micron technology, inc. all rights reserved. table of contents features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 functional overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 internal architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 register notation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 typical connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 sensor core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 lens-shading correction and blac k level conditioning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 defect correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 interpolation, aperture, and color correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 resize . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 camera control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 camera interface and test patterns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 contexts, snapshots, and flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 output data ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 ifp register list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 ifp register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 sensor core overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 pixel data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 pixel array structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 output data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 sensor core register list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 sensor core register descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 sensor read modes and timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 contexts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 viewfinder/preview and full-resolution/snap shot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 low-power preview mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 full-resolution snapshot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 switching modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 primary operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 full-power readout mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 low-power readout mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 tuning frame rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 default blanking calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 [reg | reg]: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 user blanking calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 exposure and sensor context switching. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 exposure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 switching from context a to b. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 horizontal blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 switching modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 switching frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 simple snapshots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 typical resolutions, modes and timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 reset, clocks, and standby. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 functional operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310toc.fm - rev. c 10/04 en 3 ?2004 micron technology, inc. all rights reserved. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 i/o timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 appendix a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 serial bus description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 bus idle state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 start bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 stop bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 slave address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 data bit transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 acknowledge bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 no-acknowledge bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 two-wire serial interface sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 write and read sequences (s addr = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 16-bit write sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 16-bit read sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 8-bit write sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 8-bit read sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 two-wire serial bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 data sheet designation: preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310lof.fm - rev. c 10/04 en 4 ?2004 micron technology, inc. all rights reserved. list of figures figure 1: functional block diagra m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 figure 2: internal registers grouping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 figure 3: typical configuration (connection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 figure 4: 44-ball icsp assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 figure 5: sensor core block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 figure 6: pixel array description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 figure 7: pixel color pattern detail (top ri ght corner) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 figure 8: spatial illustration of image re adout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 figure 9: primary sensor core clock relati onships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 figure 10: vertical timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 figure 11: horizontal timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 figure 12: i/o timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 figure 13: spectral response chart (prelimi nary) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 figure 14: optical center diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 figure 15: write timing to r0x09:0?value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 figure 16: read timing from r0x0 9:0; returned value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 figure 17: write timing to r0x09:0?value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 figure 18: read timing from r0x0 9:0; returned value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 figure 19: serial host interface: start condition timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 20: serial host interface: stop cond ition timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 21: serial host interface write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 22: serial host interface read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 23: acknowledge signal timing after an 8-bit write to sens or . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 24: acknowledge signal timing after an 8-bit read from se nsor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 figure 25: 44-ball icsp package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310lot.fm - rev. c 10/04 en 5 ?2004 micron technology, inc. all rights reserved. list of tables table 1: key performance parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 table 2: pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 table 3: data ordering in ycbcr mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 table 4: output data ordering in processed bayer mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 table 5: output data ordering in rgb mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 table 6: output data ordering in (8 + 2) bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 table 7: colorpipe registers (address page 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 table 8: camera control registers (address page 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 table 9: colorpipe register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 table 10: camera control register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 table 11: sensor registers (address page 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 table 12: sensor core register descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 table 13: register address functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 table 14: blanking parameter calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 table 15: user blanking minimum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 table 16: blanking definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 table 17: electrical characteristics and op erating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 table 18: i/o parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 table 19: power consumption at 2.8v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 table 20: i/o timing table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 6 ?2004 micron technology, inc. all rights reserved. general description the micron ? imaging MT9M111 is an sxga-format single-chip camera with a 1/3-inch cmos active-pixel digital image sensor. this device combines the mt9m011 image sensor core with fourth-generation digital image flow processor technology from micron imaging. it captures high-quality color images at sxga resolution. the MT9M111 features digitalclarity, micron?s breakthrough, low-noise cmos imaging technology that achieves ccd image qu ality (based on signal-to- noise ratio and low-light sens itivity) while maintaining the inherent size, cost and integration advantages of cmos. the sensor is a complete camera-on-a-chip solu- tion designed specifically to meet the low-power, low- cost demands of battery-powered products such as cellular phones, pdas, and toys. it incorporates sophisticated camera functions on-chip and is pro- grammable through a simple two-wire serial interface. the MT9M111 performs sophisticated processing functions including color recovery, color correction, sharpening, programmable gamma correction, auto black reference clamping, auto exposure, automatic 50hz/60hz flicker avoidance, lens-shading correction, auto white balance (awb), and on-the-fly defect iden- tification and correction. ad ditional features include day/night mode configuratio ns; special camera effects such as sepia tone and sola rization; and interpolation to arbitrary image size with continuous filtered zoom and pan. the device supports both xenon and led- type flash light sources in several snapshot modes. the MT9M111 can be programmed to output pro- gressive-scan images up to 30 frames per second (fps) in preview power-saving mode, and 15 fps in full-reso- lution (sxga) mode. in either mode, the image data can be output in any one of six 8-bit formats:  itu-r bt.656 (formerly ccir656, progressive scan only) ycbcr 565rgb 555rgb 444rgb raw bayer ?processed? bayer the frame_valid and line_valid signals are output on dedicated pins, along with a pixel clock that is synchronous with valid data.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 7 ?2004 micron technology, inc. all rights reserved. functional overview the MT9M111 is a fully-automatic, single-chip camera, requiring only a power supply, lens and clock source for basic operation. output video is streamed via a parallel 8-bit d out port, shown in figure 1 on page 8. the output pixel clock is used to latch data, while frame_valid and line_valid signals indi- cate the active video. the MT9M111 internal registers are configured using a two-wire serial interface. the device can be put in low-power sleep mode by asserting the standby pin and shutting down the clock. output pins can be tri-stated by de-asserting the oe# pin. both tri-stating output pins and entry in standby mode also can be achieved via two-wire serial inter- face register writes. the MT9M111 accepts input clocks up to 54 mhz, delivering up to 15 fps for sxga resolution images, and up to 30 fps for qsxga (full field-of-view, sensor pixel skipping) images. the device also supports a low- power preview configuration that delivers sxga images at 7.5 fps and qsxga images at 30 fps. the device can be programmed to slow the frame rate in low-light conditions to achieve longer exposures and better image quality. internal architecture internally, the MT9M111 consists of a sensor core and an ifp. the ifp is divided in two sections: the col- orpipe (cp), and the camera controller (cc). the sen- sor core captures raw bayer-encoded images that are then input in the ifp. the cp section of the ifp pro- cesses the incoming stream to create interpolated, color-corrected output, and the cc section controls the sensor core to maintain the desired exposure and color balance, and to support snapshot modes. the sensor core, cp, and cc registers are grouped in three separate address spaces, shown in figure 2. when accessing internal registers via the two-wire serial interface, select the desired address space by program- ming the r240 shared register. the MT9M111 accelerates mode switching with hardware-assisted context switching, and supports taking snapshots, flash snapshots, and video clips using a configurable sequencer. the MT9M111 supports a range of color formats derived from four primary color representations: ycbcr, rgb, raw bayer (unprocessed, directly from the sensor), and processed bayer (bayer format data regenerated from processed rgb). the device also supports a variety of output signaling/timing options:  standard frame_valid/line_valid video interface with gated pixel clocks  standard video interface with uniform clocking  itu-r bt.656 marker-embedded video interface with either gated or uniform pixel clocking. register notation the following register address notations are used in this document:  r:
example: r9:0?shutter width register in sensor page (page 0). used to uniquely specify a register. r example: r240?page address register. used when the register address is the same in all three pages or when by context the address page is understood.  0x<2 digit hex address> example: 0xf0?page address register. used when the register address is the same in all three pages, or when by context the address page is understood.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 8 ?2004 micron technology, inc. all rights reserved. figure 1: functional block diagram figure 2: internal registers grouping note: internal registers are grouped in th ree address spaces. program r240 to select the desired address space. sensor core sram line buffers image flow processor colorpipe image flow processor camera control image data control bus (two-wire serial i/f transactions) pixel data sclk s data clkin standby oe# v dd q/dgndq v dd /dgnd v aa /agnd vaapix 1316h x 1048v including black 1/3-inch optical format auto black compensation programmable analog gain programmable exposure dual 10-bit adcs low-power preview mode h/w context switch to/from preview bayer rgb output lens shading correction color interpolation filtered resize and zoom defect correction color correction gamma correction color conversion + formatting output fifo auto exposure auto white balance flicker detect/avoid camera control: snapshots, flash, video, clip) control bus (two-wire serial i/f trans.) d out [7:0] pixclk frame_valid line_valid strobe control bus (two-wire serial i/f transactions) + sensor control (gains, shutter, etc.) image flow processor sensor core registers r[255:0] r240 = 0 color pipeline registers r[255:0] r240 = 1 camera control registers r[255:0] r240 = 2
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 9 ?2004 micron technology, inc. all rights reserved. typical connections figure 3 shows typical MT9M111 device connec- tions. for low-noise operation, the MT9M111 requires separate power supplies for analog and digital. incom- ing digital and analog ground conductors can be tied together next to the die. both power supply rails should be decoupled to ground using ceramic capaci- tors. the use of inductance filters is not recom- mended. the MT9M111 also supports different digital core (v dd / d gnd ) and i/o power (v dd q/d gnd q) power domains that can be at different voltages. figure 3: typical con figuration (connection) note: 1. 1.5k ? resistor value recommended, but may be greater for slower two-wire speed. 2. v dd , v aa , vaapix must all be at the same pote ntial, though if connected, care must be taken to avoid excessive noise injection in the v aa /vaapix power domains. 10f 0.1f 0.1f 0.1f 1f master clock power-on reset digital gnd analog gnd + 1f 1f two-wire serial interface to cmos camera port to xenon or led flash driver sclk s data reset# saddr sclk s data clkin reset# oe# standby d gnd q d gnd a gnd 1.7v?3.6v i/o digital 2.8v core digital 2.8v analog d out [7:0] frame_valid line_valid pixclk strobe 1.5k ? 1.5k ? 1k ? v dd q v dd v aa /vaapix d gnd q d gnd a gnd v dd q v dd v aa vaapix
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 10 ?2004 micron technology, inc. all rights reserved. figure 4: 44-ball icsp assignment note: 1. bidirectional. 2 d out 3 v dd d out 6 v dd q d out v dd line valid frame valid stand by 3 d out 2 d out 1 d gnd q d gnd q reset# 1 d gnd d out 4 d out 5 d out 7 d out s addr d gnd 4 v dd q d out 0 v dd q 6 sclk v dd v dd q v dd q nc v aa nc 7 d gnd d gnd q s data 1 d gnd v aa pix nc a gnd 5 clk_in pixclk d gnd q d gnd q oe# strobe lsb0 lsb1 a b c d e f g top view (ball down) table 2: pin descriptions pin name pin type default operation description clkin bidirectional input master clock in sensor. oe# bidirectional input active low: output enable for data[7:0]. reset# bidirectional input active low: asynchronous reset. s addr bidirectional input two-wire serial interface devi ceid selection 1:0xba, 0:0x90. sclk bidirectional input two-wire serial interface clock. standby bidirectional input active high: disables imager. s data bidirectional input two-wire serial interface data i/o. d out 0 bidirectional output pixel data output 0 (lsb). d out 1 bidirectional output pixel data output 1. d out 2 bidirectional output pixel data output 2. d out 3 bidirectional output pixel data output 3. d out 4 bidirectional output pixel data output 4. d out 5 bidirectional output pixel data output 5. d out 6 bidirectional output pixel data output 6. d out 7 bidirectional output pixel data output 7 (msb). d out _lsb0 bidirecti onal output sensor bypass mode output 0?typically left unconnected for normal soc operation.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 11 ?2004 micron technology, inc. all rights reserved. note: all inputs and outputs are implemented with bidirectional buffers. care must be t aken that all inputs are driven and all outputs are driven if tri-stated. d out _lsb1 bidirecti onal output sensor bypass mode output 1?typically left unconnected for normal soc operation. frame_valid bidir ectional output active high: frame_valid; indicates active frame. line_valid bidirectional output active high: line_valid, data_valid; indicates active pixel. pixclk bidirectional output pixel clock output. strobe bidirectional output active high: strobe (xenon) or turn on (led) flash. a gnd supply analog ground. d gnd supply core digital ground. d gnd q supply i/o digital ground. v aa supply analog power (2.5v ? 3.1v). v aa pix supply pixel array analog power supply (2.5v ? 3.1v). v dd supply core digital power (2.5v ? 3.1v). v dd q supply i/o digital power (1.7v ? 3.6v). nc ? no connect. table 2: pin descriptions (continued) pin name pin type default operation description
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 12 ?2004 micron technology, inc. all rights reserved. architecture overview the MT9M111 consists of a sensor core, the color- processing pipeli ne, and a measurement and control- logic block (the camera controller). the following is a brief overview of the architecture. sensor core the sensor core is taken from the mt9m011 stand- alone sensor and includes a number of features specif- ically targeting the mobile market. of primary interest is support for low-power preview/viewfinding with hardware-accelerated switching to full-resolution for snapshots. this switch can be achieved without adversely affecting exposure or color balance. this enables taking single-fra me and xenon flash snap- shots while minimizing snapshot lag. led snapshots are discussed below; they also benefit significantly from this feature. lens-shading correction and black level conditioning the stream of raw data from the sensor enters the pipeline and undergoes several transformations. image stream processing star ts with conditioning the black level and applying a digital gain. the lens-shading block co mpensates for spatially varying signal loss caused by the lens. the block is pro- grammable and implements separate correction func- tions for r,g, and b independently. defect correction following lens correction, the data stream is ana- lyzed for the presence of defects. a two-dimensional digital filter calculates suitable replacement values. edge sensitivity minimizes false detections, helping to preserve image sharpness. interpolation, ape rture, and color cor- rection the bayer pixel pattern data is interpolated to recover missing color components for each pixel fol- lowing defect correction. configurable aperture cor- rection sharpens the image and to avoid amplifying noise, can be programmed to be less aggressive in low- light conditions. the resulting interpolated rgb data passes through the current color correction matrix (ccm), gamma, and color saturation corrections. the ccm can be manually loaded or dynamically configured by the awb unit. the gamma correction unit is fully user-programmable, and color saturation adjustments can be made both by the user and the auto exposure unit (for dynamic saturation reduction in high or low-lighting situations). resize the ifp can resize to virtually any output resolution through digitally filtered sub-sampling. output resolu- tions include, but are not limited to, vga, qvga, cif, and qcif. when the output resolution is smaller than the sensor-generated im age, smooth, continuous zoom and pan become available. the user simply defines the zoom window, pan offset, and output reso- lution, and the resizer calculates all other parameters for the resize function. camera control the camera controller continuously accumulates image brightness and color statistics. two units use these measurements to adjust the sensor and color- pipe settings. the auto exposure unit adjusts gain and shutter width to maintain a user-defined luma target. the image measurement region can be modified to permit, for example, backlight compensation. the user can also control the speed an d sensitivity of the algo- rithm from highly responsive (for led flash and view- finding) to somewhat dampened (for video). finally, the unit can detect 50hz or 60hz rolling flicker bars (due to ambient illumination) and adjusts exposure appropriately to eliminate this adverse effect on image quality. the awb module adjusts gains and the ccm to compensate for the effects of changing scene illumina- tion on the quality of the color rendition. the user has control over the region of the scene to be analyzed as well as the responsivity of the algorithm to illuminant changes. camera interface and test patterns the MT9M111 outputs processed video as a stan- dard itu-r bt.656 stream, an rgb stream, or as pro- cessed or unprocessed ba yer data. the itu-r bt.656 stream contains ycbcr 4:2:2 data with optional embedded synchronization codes. this output is typi- cally suitable for subsequent display by standard (pro- gressive scan) video equipment, or jpeg/mpeg compression. rgb functionality provides support for lcd devices. the MT9M111 can be configured to output 16-bit rgb (rgb565), 15-bit rgb (rgb555), and two types of 12-bit rgb (rgb444). the user can configure internal
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 13 ?2004 micron technology, inc. all rights reserved. registers to swap odd and even bytes, chrominance channels, and luminance and chrominance compo- nents to ease interfacing to application processors. to assist in integration an d system debug, a variety of test patterns are provided, from simple ramps to colorbars. contexts, snapshots, and flash for a number of parameters, registers are provided for storing two ?contexts?: context a and context b. these contexts enable the user to setup the camera for a number of different modes, then switch between modes with a single register write to the global con- text control register (gcc r). a typical example is to use context a for viewfinder/preview settings and context b for snapshots. functions supporting context switching include:  sensor core image array readout (e.g., low-power qsxga preview to/from full-power sxga snapshot)  the resizer (output resolutions for preview and snapshot)  camera interface (e.g., rgb565 for lcd preview and ycbcr for snapshots) to facilitate taking snapshots and flash snapshots, the ifp includes a camera -control sequencer that automates the process of stepping through a number of preset configurable prog rams. in addition to basic snapshots, there are programs for both xenon and led assisted snapshots. a flash-triggering controller provides an approp riate timing strobe for synchroniz- ing the onset of flash illu mination with the rolling shutter.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 14 ?2004 micron technology, inc. all rights reserved. output data ordering table 3: data ordering in ycbcr mode mode byte default cbi yi cri yi+1 swap crcb cri yi cbi yi+1 swapyc yi cbi yi+1 cri swap crcb, swapyc yi cri yi+1 cbi table 4: output data ordering in processed bayer mode mode line byte default first gi ri+1 gi+2 ri+3 second bi gi+1 bi+2 gi+3 flip bayer col first ri gi+1 ri+2 gi+3 second gi bi+1 gi+2 bi+3 flip bayer row first bi gi+1 bi+2 gi+3 second gi ri+1 gi+2 ri+3 flip bayer col, flip bayer row first gi bi+1 gi+2 bi+3 second ri gi+1 ri+2 gi+3 table 5: output data ordering in rgb mode mode (swap disabled) byte d7 d6 d5 d4 d3 d2 d1 d0 rgb565 first r7 r6 r5 r4 r3 g7 g6 g5 second g4 g3 g2 b7 b6 b5 b4 b3 rgb555 first 0 r7r6r5r4r3g7g6 second g5 g4 g3 b7 b6 b5 b4 b3 rgb444x first r7 r6 r5 r4 g7 g6 g5 g4 second b7 b6 b5 b4 0 0 0 0 rgbx444 first 0 0 0 0 r7 r6 r5 r4 second g7 g6 g5 g4 b7 b6 b5 b4 table 6: output data ordering in (8 + 2) bypass mode mode byte d7 d6 d5 d4 d3 d2 d1 d0 8 + 2 bypassfirstb9b8b7b6b5b4b3b2 second000000b1b0
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 15 ?2004 micron technology, inc. all rights reserved. ifp register list table 7: colorpipe registers (address page 1) register #dec (hex) register name data format default value dec (hex) module 5 (05) aperture correction 0000 0000 0000 dddd 3 (0003) interp 6 (06) operating mode control dddd dddd 0ddd dddd 28686 (700e) cfg 8 (08) output format control 0000 0ddd dddd dddd 128 (0080) cfg 16 (10) reserved ? 61437 (effd) ? 17 (11) reserved ? 64831 (fd3f) ? 18 (12) reserved ? 16367 (3fef) ? 19 (13) reserved ? n/a ? 20 (14) reserved ? n/a ? 21 (15) reserved ? n/a ? 27 (1b) reserved ? 0 (0000) ? 28 (1c) reserved ? 0 (0000) ? 29 (1d) reserved ? n/a ? 30 (1e) reserved ? 512 (0200) ? 37 (25) color saturation control 0000 0000 00dd dddd 5 (0005) rgb2yuv 52 (34) luma offset dddd dddd dddd dddd 16 (0010) camlnt 53 (35) luma clip dddd dddd dd dd dddd 61456 (f010) camlnt 58 (3a) output format control 2?context a 0ddd dddd dddd dddd 512 (0200) camint 59 (3b) lens correction parameter 1 ? 1066 (042a) lenscorr 60 (3c) lens correction parameter 2 ? 1024 (0400) lenscorr 71 (47) reserved ? 24 (0018) ? 72 (48) test pattern generator control 0 000 0000 d000 0ddd 0 (0000) fifoint 76 (4c) defect correction context a 0000 0000 0000 0ddd 0 (0000) dfctcorr 77 (4d) defect correction context b 0000 0000 0000 0ddd 0 (0000) dfctcorr 78 (4e) reserved ? 10 (000a) ? 80 (50) reserved ? n/a ? 82 (52) reserved ? 0 (0000) ? 83 (53) gamma correction parameter 1 ? 7700 (1e14) gmacorr 84 (54) gamma correction parameter 2 ? 17966 (462e) gmacorr 85 (55) gamma correction parameter 3 ? 34666 (876a) gmacorr 86 (56) gamma correction parameter 4 ? 47008 (b7a0) gmacorr 87 (57) gamma correction parameter 5 ? 57548 (e0cc) gmacorr 88 (58) gamma correction parameter 6 ? 0 (0000) gmacorr 104 (68) reserved ? 17 (0011) ? 128 (80) lens correction parameter 3 ? 7 (0007) lenscorr 129 (81) lens correction parameter 4 ? 56588 (dd0c) lenscorr 130 (82) lens correction parameter 5 ? 62696 (f4e8) lenscorr 131 (83) lens correction parameter 6 ? 1276 (04fc) lenscorr 132 (84) lens correction parameter 7 ? 57868 (e20c) lenscorr 133 (85) lens correction parameter 8 ? 63212 (f6ec) lenscorr 134 (86) lens correction parameter 9 ? 764 (02fc) lenscorr 135 (87) lens correction parameter 10 ? 56588 (dd0c) lenscorr 136 (88) lens correction parameter 11 ? 62696 (f4e8) lenscorr 137 (89) lens correction parameter 12 ? 250 (00fa) lenscorr
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 16 ?2004 micron technology, inc. all rights reserved. 138 (8a) lens correction parameter 13 ? 34866 (8832) lenscorr 139 (8b) lens correction parameter 14 ? 56754 (ddb2) lenscorr 140 (8c) lens correction parameter 15 ? 63466 (f7ea) lenscorr 141 (8d) lens correction parameter 16 ? 2 (0002) lenscorr 142 (8e) lens correction parameter 17 ? 47646 (ba1e) lenscorr 143 (8f) lens correction parameter 18 ? 60627 (ecd3) lenscorr 144 (90) lens correction parameter 19 ? 63473 (f7f1) lenscorr 145 (91) lens correction parameter 20 ? 255 (00ff) lenscorr 146 (92) lens correction parameter 21 ? 48926 (bf1e) lenscorr 147 (93) lens correction parameter 22 ? 61142 (eed6) lenscorr 148 (94) lens correction parameter 23 ? 63474 (f7f2) lenscorr 149 (95) lens correction parameter 24 ? 3 (0003) lenscorr 153 (99) line counter ???? ???? ???? ???? n/a camint 154 (9a) frame counter ???? ???? ???? ???? n/a camint 155 (9b) output format control 2?context b 0ddd dddd dddd dddd 512 (0200) camint 157 (9d) reserved ? 9390 (24ae) ? 158 (9e) reserved ? n/a ? 159 (9f) reducer horizontal pan?context b 0d0 0 0ddd dddd dddd 0 (0000) interp 160 (a0) reducer horizontal zoom?context b 0000 0ddd dd dd dddd 1280 (0500) interp 161 (a1) reducer horizontal size?context b 0000 0ddd dddd dddd 1280 (0500) interp 162 (a2) reducer vertical pan?context b 0d0 0 0ddd dddd dddd 0 (0000) interp 163 (a3) reducer vertical zoom?context b 0 000 0ddd dddd dddd 1024 (0400) interp 164 (a4) reducer vertical si ze?context b 0000 0ddd dddd dddd 1024 (0400) interp 165 (a5) reducer horizontal pan?context a 0d00 0ddd dddd dddd 0 (0000) interp 166 (a6) reducer horizontal zoom?context a 0000 0ddd dddd dddd 1280 (0500) interp 167 (a7) reducer horizontal size?context a 0000 0ddd dddd dddd 640 (0280) interp 168 (a8) reducer vertical pan?context a 0d00 0ddd dddd dddd 0 (0000) interp 169 (a9) reducer vertical zoom?context a 0000 0ddd dddd dddd 1024 (0400) interp 170 (aa) reducer vertical size?context a 0 000 0ddd dddd dddd 512 (0200) interp 171 (ab) reducer curren t zoom horizontal ???? 0??? ???? ???? n/a interp 172 (ac) reducer curren t zoom vertical ???? 0??? ???? ???? n/a interp 174 (ae) reducer zoom step size dddd dddd dddd dddd 1284 (0504) interp 175 (af) reducer zoom control 0000 00dd 0ddd dddd 16 (0010) interp 179 (b3) global clock control 0000 0000 0000 00dd 2 (0002) clockrst 180 (b4) reserved ? 32 (0020) ? 181 (b5) uniform clocking control parameter ? 257 (0101) ? 182 (b6) lens correction parameter 25 ? 4363 (110b) lenscorr 183 (b7) lens correction parameter 26 ? 15399 (3c27) lenscorr 184 (b8) lens correction parameter 27 ? 4362 (110a) lenscorr 185 (b9) lens correction parameter 28 ? 12834 (3222) lenscorr 186 (ba) lens correction parameter 29 ? 5643 (160b) lenscorr 187 (bb) lens correction parameter 30 ? 12836 (3224) lenscorr 188 (bc) lens correction parameter 31 ? 9228 (240c) lenscorr 189 (bd) lens correction parameter 32 ? 24124 (5e3c) lenscorr 190 (be) lens correction parameter 33 ? 127 (007f) lenscorr table 7: colorpipe registers (address page 1) (continued) register #dec (hex) register name data format default value dec (hex) module
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 17 ?2004 micron technology, inc. all rights reserved. 191 (bf) lens correction parameter 34 ? 8200 (2008) lenscorr 192 (c0) lens correction parameter 35 ? 20023 (4e37) lenscorr 193 (c1) lens correction parameter 36 ? 100 (0064) lenscorr 194 (c2) lens correction parameter 37 ? 8463 (210f) lenscorr 195 (c3) lens correction parameter 38 ? 19250 (4b32) lenscorr 196 (c4) lens correction parameter 39 ? 100 (0064) lenscorr 200 (c8) global context control dddd dddd dddd dddd 0 (0000) cntxctl 201 (c9) reserved ? n/a ? 202 (ca) reserved ? n/a ? 203 (cb) reserved ? n/a ? 204 (cc) reserved ? n/a ? 205 (cd) reserved ? n/a ? 206 (ce) reserved ? n/a ? 207 (c) reserved ? n/a ? 208 (d0) reserved ? n/a ? 220 (dc) gamma correction parameter 7 ? 7700 (1e14) gmacorr 221 (dd) gamma correction parameter 8 ? 17966 (462e) gmacorr 222 (de) gamma correction parameter 9 ? 34666 (876a) gmacorr 223 (df) gamma correction parameter 10 ? 47008 (b7a0) gmacorr 224 (e0) gamma correction param eter 11 ? 57548 (e0cc) gmacorr 225 (e1) gamma correction parameter 12 ? 0 (0000) gmacorr 226 (e2) effects mode dddd dddd 0000 0ddd 28672 (7000) gmacorr 227 (e3) effects sepia dddd dddd dddd dddd 45091 (b023) gmacorr 240 (f0) page map 0000 0000 0000 0ddd 0 (0000) cfg 241 (f1) byte-wise address ? reserved ? table 7: colorpipe registers (address page 1) (continued) register #dec (hex) register name data format default value dec (hex) module table 8: camera control registers (address page 2) register #dec (hex) register name data format default value dec (hex) module 2 (02) color correction parameter 1 ? 110 (006e) colorcorr 3 (03) color correction parameter 2 ? 10531 (2923) colorcorr 4 (04) color correction parameter 3 ? 1316 (0524) colorcorr 9 (09) color correction parameter 4 ? 146 (0092) colorcorr 10 (0a) color correction parameter 5 ? 22 (0016) colorcorr 11 (0b) color correction parameter 6 ? 8 (0008) colorcorr 12 (0c) color correction parameter 7 ? 171 (00ab) colorcorr 13 (0d) color correction parameter 8 ? 147 (0093) colorcorr 14 (0e) color correction parameter 9 ? 88 (0058) colorcorr 15 (0f) color correction parameter 10 ? 77 (004d) colorcorr 16 (10) color correction parameter 11 ? 169 (00a9) colorcorr 17 (11) color correction parameter 12 ? 160 (00a0) colorcorr 18 (12) color correction parameter 13 ? n/a colorcorr 19 (13) color correction parameter 14 ? n/a colorcorr
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 18 ?2004 micron technology, inc. all rights reserved. 20 (14) color correction parameter 15 ? n/a colorcorr 21 (15) color correction parameter 16 ? 373 (0175) colorcorr 22 (16) color correction parameter 17 ? 22 (0016) colorcorr 23 (17) color correction parameter 18 ? 67 (0043) colorcorr 24 (18) color correction parameter 19 ? 12 (000c) colorcorr 25 (19) color correction parameter 20 ? 0 (0000) colorcorr 26 (1a) color correction parameter 21 ? 21 (0015) colorcorr 27 (1b) color correction parame ter 22 ? 31 (001f) colorcorr 28 (1c) color correction parameter 23 ? 22 (0016) colorcorr 29 (1d) color correction parameter 24 ? 152 (0098) colorcorr 30 (1e) color correction parameter 25 ? 76 (004c) colorcorr 31 (1f) awb parameter 1 ? 160 (00a0) awb 32 (20) awb parameter 2 ? 51220 (c814) awb 33 (21) awb parameter 3 ? 32896 (8080) awb 34 (22) awb parameter 4 ? 55648 (d960) awb 35 (23) awb parameter 5 ? 55648 (d960) awb 36 (24) awb parameter 6 ? 32512 (7f00) awb 38 (26) auto exposure window horizontal boundaries dddd dddd dddd dddd 32768 (8000) autoexp 39 (27) auto exposure window vertical bounda ries dddd dddd dddd dd dd 32776 (8008) autoexp 40 (28) awb parameter 7 ? 61188 (ef04) awb 41 (29) awb parameter 8 ? 36211 (8d73) awb 42 (2a) awb parameter 9 ? 208 (00d0) awb 43 (2b) auto exposure center horizontal window boundaries dddd dddd dddd dddd 24608 (6020) autoexp 44 (2c) auto exposure center vertical window boundaries dddd dddd dddd dddd 24608 (6020) autoexp 45 (2d) awb window boundaries dd dd dddd dddd dddd 61600 (f0a0) awb 46 (2e) auto exposure target and precision control dddd dddd dddd dddd 3146 (0c4a) autoexp 47 (2f) auto exposure speed and sensitivity control? context a dddd dddd dddd dddd 57120 (df20) autoexp 48 (30) awb parameter 10 ? n/a awb 49 (31) awb parameter 11 ? n/a awb 50 (32) awb parameter 12 ? n/a awb 51 (33) auto exposure parameter 1 ? 5230 (146e) autoexp 54 (36) auto exposure parameter 2 ? 30736 (7810) autoexp 55 (37) auto exposure parameter 3 ? 768 (0300) autoexp 56 (38) auto exposure parameter 4 ? 1088 (0440) autoexp 57 (39) auto exposure parameter 5 ? 1676 (068c) autoexp 58 (3a) auto exposure parameter 6 ? 1676 (068c) autoexp 59 (3b) auto exposure parameter 7 ? 1676 (068c) autoexp 60 (3c) auto exposure parameter 8 ? 1676 (068c) autoexp 61 (3d) auto exposure parameter 9 ? 6105 (17d9) autoexp 62 (3e) awb parameter 13 ? 7423 (1cff) awb 63 (3f) auto exposure parameter 10 ? n/a autoexp 70 (46) auto exposure parameter 11 ? 55552 (d900) autoexp 75 (4b) reserved ? 0 (0000) ? 76 (4c) auto exposure parameter 12 ? n/a autoexp table 8: camera control regist ers (address page 2) (continued) register #dec (hex) register name data format default value dec (hex) module
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 19 ?2004 micron technology, inc. all rights reserved. 77 4d) auto exposure parameter 13 ? n/a autoexp 79 (4f) reserved ? n/a ? 87 (57) auto exposure parameter 14 ? 537 (0219) autoexp 88 (58) auto exposure parameter 15 ? 644 (0284) autoexp 89 (59) auto exposure parameter 16 ? 537 (0219) autoexp 90 (5a) auto exposure parameter 17 ? 644 (0284) autoexp 91 (5b) flicker control 0 ?000 0000 0000 0ddd 2 (0002) fd 92 (5c) reserved ? 4620 (120c) ? 93 (5d) reserved ? 5394 (1512) ? 94 (5e) color correction para meter 26 ? 26684 (683c) colorcorr 95 (5f) color correction parameter 27 ? 12296 (3008) colorcorr 96 (60) color correction parameter 28 ? 2 (0002) colorcorr 97 (61) reserved ? 32896 (8080) ? 98 (62) auto exposure digital gains monito r ???? ???? ???? ???? n/a autoexp 99 (63) reserved ? n/a ? 100 (64) reserved ? 23036 (59fc) ? 101 (65) auto exposure parameter 18 ? 0 (0000) autoexp 103 (67) auto exposure digital gain limits dddd dddd dddd dddd 16400 (4010) autoexp 104 (68) reserved ? 17 (0011) ? 106 (6a) reserved ? n/a ? 107 (6b) reserved ? n/a ? 108 (6c) reserved ? n/a ? 109 (6d) reserved ? n/a ? 110 (6e) reserved ? n/a ? 111 (6f) reserved ? n/a ? 112 (70) reserved ? n/a ? 113 (71) reserved ? n/a ? 114 (72) reserved ? n/a ? 115 (73) reserved ? n/a ? 116 (74) reserved ? n/a ? 117 (75) reserved ? n/a ? 118 (76) reserved ? n/a ? 119 (77) reserved ? n/a ? 120 (78) reserved ? n/a ? 121 (79) reserved ? n/a ? 122 (7a) reserved ? n/a ? 123 (7b) reserved ? n/a ? 124 (7c) reserved ? n/a ? 125 (7d) reserved ? n/a ? 130 (82) auto exposure parameter 19 ? 1020 (03fc) autoexp 131 (83) auto exposure parameter 20 ? 769 (0301) autoexp 132 (84) auto exposure parameter 21 ? 193 (00c1) autoexp 133 (85) auto exposure parameter 22 ? 929 (03a1) autoexp 134 (86) auto exposure parameter 23 ? 980 (03d4) autoexp 135 (87) auto exposure parameter 24 ? 983 (03d7) autoexp table 8: camera control regist ers (address page 2) (continued) register #dec (hex) register name data format default value dec (hex) module
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 20 ?2004 micron technology, inc. all rights reserved. 136 (88) auto exposure parameter 25 ? 921 (0399) autoexp 137 (89) auto exposure parameter 26 ? 1016 (03f8) autoexp 138 (8a) auto exposure parameter 27 ? 28 (001c) autoexp 139 (8b) auto exposure parameter 28 ? 957 (03bd) autoexp 140 (8c) auto exposure parameter 29 ? 987 (03db) autoexp 141 (8d) auto exposure parameter 30 ? 957 (03bd) autoexp 142 (8e) auto exposure parameter 31 ? 1020 (03fc) autoexp 143 (8f) auto exposure parameter 32 ? 990 (03de) autoexp 144 (90) auto exposure parameter 33 ? 990 (03de) autoexp 145 (91) auto exposure parameter 34 ? 990 (03de) autoexp 146 (92) auto exposure parameter 35 ? 990 (03de) autoexp 147 (93) auto exposure parameter 36 ? 31 (001f) autoexp 148 (94) auto exposure parameter 37 ? 65 (0041) autoexp 149 (95) auto exposure parameter 38 ? 867 (0363) autoexp 150 (96) reserved ? 0 (0000) ? 151 (97) reserved ? n/a ? 152 (98) reserved ? 255 (00ff) ? 153 (99) reserved ? 1 (0001) ? 156 (9c) auto exposure spee d and sensitivity control? context b dddd dddd dddd dddd 57120 (df20) autoexp 180 (b4) reserved ? 32 (0020) ? 181 (b5) reserved ? n/a ? 198 (c6) reserved ? 0 (0000) ? 199 (c7) reserved ? n/a ? 200 (c8) global context control ddd d dddd dddd dddd 0 (0000) cntxctl 201 (c9) camera control sequencer parameter 1 ? n/a camctl 202 (ca) camera control sequencer parameter 2 ? n/a camctl 203 (cb) camera control sequencer parameter 3 ? 0 (0000) camctl 204 (cc) camera control sequencer parameter 4 ? 0 (0000) camctl 205 (cd) camera control sequencer parameter 5 ? 8608 (21a0) camctl 206 (ce) camera control sequencer parameter 6 ? 7835 (1e9b) camctl 207 (cf) camera control sequencer parameter 7 ? 19018 (4a4a) camctl 208 (d0) camera control sequencer parameter 8 ? 5773 (168d) camctl 209 (d1) camera control sequencer parameter 9 ? 77 (004d) camctl 210 (d2) camera control sequencer parameter 10 ? 0 (0000) camctl 211 (d3) context control parameter 1 ? 0 (0000) cntxctl 212 (d4) camera control sequencer parameter 11 ? 520 (0208) camctl 213 (d5) camera control sequencer parameter 12 ? 0 (0000) camctl 239 (ef) awb parameter 14 ? 8 (0008) awb 240 (f0) page map 0000 0000 0000 0ddd 0 (0000) cfg 241 (f1) byte-wise address ? reserved ? 242 (f2) awb parameter 15 ? 0 (0000) awb 243 (f3) reserved ? 0 (0000) ? 244 (f4) color correction parameter 29 ? 110 (006e) colorcorr 245 (f5) color correction parameter 30 ? 135 (0087) colorcorr table 8: camera control regist ers (address page 2) (continued) register #dec (hex) register name data format default value dec (hex) module
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 21 ?2004 micron technology, inc. all rights reserved. note: data format key: 0 = ?don't care? bit. the exceptions: r0:0 and r255:0, which are hardwi red r/o binary values. d = r/w bit ? = r/o bit. 246 (f6) color correction parameter 31 ? 54 (0036) colorcorr 247 (f7) color correction parameter 32 ? 13 (000d) colorcorr 248 (f8) color correction parame ter 33 ? 171 (00ab) colorcorr 249 (f9) color correction parameter 34 ? 136 (0088) colorcorr 250 (fa) color correction parameter 35 ? 72 (0048) colorcorr 251 (fb) color correction parameter 36 ? 87 (0057) colorcorr 252 (fc) color correction parameter 37 ? 94 (005e) colorcorr 253 (fd) color correction parameter 38 ? 122 (007a) colorcorr 254 (fe) color correction parameter 39 ? 20543 (503f) colorcorr 255 (ff) color correction parameter 40 ? 43136 (a880) colorcorr table 8: camera control regist ers (address page 2) (continued) register #dec (hex) register name data format default value dec (hex) module
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 22 ?2004 micron technology, inc. all rights reserved. ifp register description configuration the vast majority of ifp registers associate naturally to one of the ifp modules. these modules are identi- fied in table 8 on page 17. detailed register descrip- tions follow in table 9. a few registers create effects across a number of module functions. these include r240 page map register (r/w); r6:1 0x106 operating mode control register (r/w); r8:1 0x108 output format control register (r/w); the r62:2 0x23e gain types and ccm threshold register?the gain threshold for ccm adjustment (r/w). table 9: colorpipe register description register# (hex) description r5:1?0x105 - apertu re correction default 0x0003 description aperture correction scal e factor, used for sharpening. bit 3 enables automatic sharpness re duction control (s ee r51:2 0x233). bits 2:0 sharpening factor: ?000? ? no sharpening. ?001? ? 25% sharpening. ?010? ? 50% sharpening. ?011? ? 75% sharpening. ?100? ? 100% sharpening. ?101? ? 125% sharpening. ?110? ? 150% sharpening. ?111? ? 200% sharpening. r6:1?0x106 - operating mode control (r/w) default 0x700e description this register specifies the operating mode of the ifp. bit 15 enables manual white balance. user can set the ba se matrix and color channel gains. this bit must be asserted and de-asserted with a frame in between to force new color correction settings to take effect. bit 14 enables auto exposure. bit 13 enables on-the-fly defect correction. bit 12 clips aperture correcti ons. small aperture corrections (< 8) are attenuated to reduce noise amplification. bit 11 load color correction matrix 1: in manual white balance mode, triggers the loading of a new base matrix in color correction and the loading of new base sensor gain ratios. 0: enables the matrix to be changed ?offline.? bit 10 enables lens-shading correction. 1: enables lens-sha ding correction. bit 9 reserved. bit 8 reserved. bit 7 enables flicker detection. 1: enables automati c flicker detection. bit 6 reserved for future expansion. bit 5 reserved. bit 4 bypasses color correction matrix. 1: outputs ?raw? color by passing colo r correction. 0: normal color processing.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 23 ?2004 micron technology, inc. all rights reserved. bits 3:2 auto exposure back light compensation control. ?00??auto exposure sampling wind ow is specified by r38:2 and r39:2 (?large window?). ?01? ? auto exposure sampling window is specified by r43:2 and r44:2 (?small window?). ?1x? ? auto exposure sampling window is specified by the weighted sum of the large window and the small window, with the small window we ighted four times more heavily. bit 1 enables awb. 1: enables auto white balance. 0: freezes white balance at current values. bit 0 reserved for future expansion. r8:1?0x108 - output fo rmat control (r/w) default 0x0080 description this register specifies the output timing and forma t in conjunction with r58:1 or r155:1 (depen ding on the context). bits 15:10 reserved fo r future expansion. bit 9 flip bayer columns in pr ocessed bayer output mode. 0: column order is green, red and blue, green. 1: column order is red, green and green, blue. bit 8 flip bayer row in processed bayer output mode. 0: first row contains green and red; the second row contains blue and green. 1: first row contains blue and green; the second row contains green and red. bit 7 controls the values used for the protection bits in rec. itu-r bt.656 codes. 0: use zeros for the protection bits. 1: use the correct values. bit 5 multiplexes y (in ycbcr mode) or green (in rgb mode) channel on all channels (monochrome). 1: forces y/g onto all channels. bit 4 disables cab color output channel (cb = 128) in ycbc r mode and disables the blue color output channel (b = 0) in rgb mode. 1: forces cab to 128 or b to 0. bit 3 disables y color output channel (y = 128) in ycbcr and disables the green color output channel (g = 0) in rgb mode. 1: forces y to 128 or g to 0. bit 2 disables cr color output channel (cr = 128) in ycbcr mode and disables the red color output channel (r = 0) in rgb mode. 1: forces cr to 128 or r to 0. bit 1 toggles the assumptions ab out bayer vertical cfa shift. 0: row containing red comes first. 1: row containing blue comes first. bit 0 toggles the assu mptions about bayer ho rizontal cfa shift. 0: green comes first. 1: red or blue comes first. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 24 ?2004 micron technology, inc. all rights reserved. r37:1?0x125 - color satu ration control (r/w) default 0x0005 description this register specifies th e color saturation control settings. bit 5:3 specify overall attenuat ion of the color saturation. ?000? ? full color saturation ?001? ? 75% of full saturation ?010? ? 50% of full saturation ?011? ? 37.5% of full saturation ?100? ? 25% of full saturation ?101? ? 150% of full saturation ?110? ? black and white bit 2:0 specify color saturation attenuation at high lumi nance (linearly increasing atte nuation from no attenuation to monochrome at luminance of 224). ?000? ? no attenuation. ?001? ? attenuation starts at luminance of 216. ?010? ? attenuation starts at luminance of 208. ?011? ? attenuation starts at luminance of 192. ?100? ? attenuation starts at luminance of 160. ?101? ? attenuation starts at luminance of 96. r52:1?0x134 - luma offset (r/w) default 0x0010 description offset added to th e luminance prior to output. bits 15:8 y offset in ycbcr mode. bits 7:0 offset in rgb mode. r53:1?0x135 - luma clip (r/w) default 0xf010 description clipping limi ts for output luminance. bits 15:8 highest value of output luminance. bits 7:0 lowest value of output luminance. r58:1?0x13a - output format control 2?context a (r/w) default 0x0200 description output format control 2a. bit 14 output processed bayer data. bit 13 reserved bit 12 reserved bit 11 enables embedding rec. itu-r bt.656 synchronization codes in the output data. see r155:1 bit 10 entire image processing is bypa ssed and raw bayer is output directly. in ycbcr or rgb mode: 0: normal operation, sensor core data flows through ifp. 1: bypass ifp and output imager da ta directly (full 10 bits). the image data still passes through the camera interface fifo and the 10 bits are formatted to two outp ut bytes through the camera interface; i.e., 8 + 2. data rate is effectively the same as default 16-bit /per pixel modes. auto exposure /awb, etc. still function and control the sensor, though they are assuming so me gain/correction through the colorpipe. see r155:1 bit 9 inverts output pixel clock. by defa ult, this bit it asserted and data is la unched off the falling edge of pixclk for capture by the receiver on the rising edge. see r155:1 bit 8 enables rgb output. 0: output ycbcr data. 1: output rgb format data as defined by r58:1[7:6]. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 25 ?2004 micron technology, inc. all rights reserved. bits 7:6 rgb output format: ?00? ? 16-bit rgb565. ?01? ? 15-bit rgb555. ?10? ? 12-bit rgb444x. ?11? ? 12-bit rgbx444. bits 5:4 test ramp output: ?00? ? off. ?01? ? by column. ?10? ? by row. ?11? ? by frame. bit 3 outputs rgb or ycbcr values are shifted 3 bits up. use wi th r58:1[5:4] to test lc ds with low color depth. bit 2 averages two nearby ch rominance bytes. see r155:1 bit 1 in ycbcr mode swap c and y bytes. in rgb mode, swap odd and even bytes. see r155:1 bit 0 in ycbcr mode, swaps cb and cr channels. in rgb mode, swaps r and b channels. see r155:1 r72:1?0x148 - test pattern generator control (r/w) default 0x0000 description this register enables test pattern generation at the input of the image proces sor. values greater than ?0? turn on the test pattern generator. the brightness of the flat color areas depend s on the value programmed (from 6?1) in this register. the va lue 7 produces the color bar pattern. value 0 selects the sensor image. bit 7 1: forces wb digital gains to 1.0. 0: normal operation. bits 2:0 test patt ern selection. r76:1?0x14c - defect correction?context a (r/w) default 0x0000 description context a register with defect co rrection, mode enables, and calibration bits. bit 2 reserved bit 1 reserved bit 0 enables 2d defect correction. r77:1?0x14d - defect correction?context b (r/w) default 0x0000 description context b register with defect co rrection, mode enables, and calibration bits. bit 2 reserved bit 1 reserved bit 0 enables 2d defect correction. r153:1?0x199 - line counter (r/o) default n/a description use line counter to determine th e number of the line currently being output. bits 12:0 line count. r154:1?0x19a - frame counter (r/o) default n/a description use frame counter to determine th e index of the frame currently being output. bits 15:0 frame count. r155:1?0x19b - output format control 2?context b (r/w) default 0x0200 description output format control 2b. bit 14 output processed bayer data. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 26 ?2004 micron technology, inc. all rights reserved. bit 13 reserved. bit 12 reserved bit 11 enables embedding rec. itu-r bt.656 synchronization codes to the output data. see r58:1 bit 10 entire image processing is bypa ssed and raw bayer is output directly. in ycbcr or rgb mode: 0: normal operation, sensor core data flows through ifp. 1: bypass ifp and output imager da ta directly (full 10 bits). the image data still passes through the camera interface fifo and the 10 bits are formatted to two outp ut bytes through the camera interface; i.e., 8 + 2. data rate is effectively the same as default 16-bit /per pixel modes. auto exposure /awb, etc. still function and control the sensor, though they are assuming so me gain/correction through the colorpipe. see r58:1 bit 9 inverts output pixel clock. by defa ult, this bit it asserted and data is la unched off the falling edge of pixclk for capture by the receiver on the rising edge. see r58:1 bit 8 enables rgb output. 0: output ycbcr data. 1: output rgb format data as defined by r155:1[7:6]. see r58:1 bits 7:6 rgb output format: ?00? ? 16-bit rgb565. ?01? ? 15-bit rgb555. ?10? ? 12-bit rgb444x. ?11? ? 12-bit rgbx444. bits 5:4 test ramp output: ?00? ? off. ?01? ? by column. ?10? ? by row. ?11? ? by frame. bit 3 output rgb or ycbcr values are shifted 3 bits up. use with r58:1[5:4] to test lcds with lo w color depth. bit 2 averages two nearby ch rominance byte s. see r58:1 bit 1 in ycbcr mode swap c and y bytes. in rgb mode, swap odd and even bytes. see r58:1 bit 0 in ycbcr mode, swaps cb and cr channels. in rgb mode, swaps r and b channels. see r58:1 r159:1?0x19f - redu cer horizontal pan?context b (r/w) default 0x0000 description controls reducer horizontal pan in context b bit 14 0: mt9v111-compat ible origin at x = 0. 1: centered origin at 640 for mo re convenient z oom and resize. bits 10:0 x pan: unsigned offset from x = 0 (bit 14 = 0), or two?s complement from x = 640 (bit 14 = 1). r160:1?0x1a0 - reducer horizo ntal zoom?context b (r/w) default 0x0500 description controls reducer horizontal width of zoom window for field of view in context b. bits 10:0 x zoom b. must be x size b r161:1?0x1a1 - reducer horizontal output size?context b (r/w) default 0x0500 description controls reducer horizo ntal output size in context b. bits 10:0 x size b. must be x zoom b. r162:1?0x1a2 - reducer vert ical pan?context b (r/w) default 0x0000 description controls reducer vertical pan in context b. bit 14 0: mt9v111-compat ible origin at y = 0. 1: centered origin at y = 512 for more convenient zoom and resize. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 27 ?2004 micron technology, inc. all rights reserved. bits 10:0 y pan: unsigned offset from y = 0 (bit 14 = 0), or two?s complement from y = 512 (bit 14 = 1). r163:1?0x1a3 - reducer vertic al zoom?context b (r/w) default 0x0400 description controls reducer vertical height of zoom window for field of view in context b. bits 10:0 y zoom b. must be y size b. r164:1?0x1a4 - reducer vertical output size?context b (r/w) default 0x0400 description controls reducer vertic al output size in context b. bits 10:0 y size b. must be y zoom b. r165:1?0x1a5 - reducer horizo ntal pan?context a (r/w) default 0x0000 description controls reducer horizontal pan in context a. bit 14 0: mt9v111-compatible offset from x = 0. 1: centered origin at 640 for mo re convenient z oom and resize. bits 10:0 x pan: unsigned offset from x = 0 (bit 14 = 0), or two?s complement from x = 640 (bit 14 = 1). r166:1?0x1a6 - reducer horizo ntal zoom?context a (r/w) default 0x0500 description controls reducer horizontal width of zoom window for field of view in context a. bits 10:0 x zoom a. must be x size a. r167:1?0x1a7 - reducer horizontal output size?context a (r/w) default 0x0280 description controls reducer horizo ntal output size in context a. bits 10:0 x size a. must be x zoom a.. r168:1?0x1a8 - reducer vert ical pan?context a (r/w) default 0x0000 description controls reducer vertical pan in context a. bit 14 0: mt9v111-compat ible origin at y = 0. 1 : centered origin at y = 512 for more convenient zoom and resize. bits 10:0 y pan: unsigned offset from y = 0 (bit 14 = 0), or two?s complement from y = 512 (bit 14 = 1). r169:1?0x1a9 - reducer vertic al zoom?context a (r/w) default 0x0400 description controls reducer vertical height of zoom window for field of view in context a. bits 10:0 y zoom a. must be y size a. r170:1?0x1aa - reducer vertical output size?context a (r/w) default 0x0200 description controls reducer vertic al output size in context a. bits 10:0 y sizea. must be y zoom a. r171:1?0x1ab - reducer curren t horizontal zoom (r/o) default n/a description current horizontal zoom. bits 10:0 current zoom window width. after au tomatic zoom (r175:1), copy r171:1 to the snapshot x zoom register r166:1 (context a) or r160:1 (context b) so the snapshot has th e same field of view as preview. also copy to snapshot x size register r167:1 (context a) or r161 (conte xt b) for largest snapshot. bits 15:12 reserved. mask off these bits be fore performing the above copy operation. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 28 ?2004 micron technology, inc. all rights reserved. r172:1?0x1ac - reducer curr ent vertical zoom (r/o) default n/a description current vertical zoom. bits 10:0 current zoom window height. after automatic zoom (r175:1), copy r172: 1 to the snapshot y zoom register r169:1 (context a) or r163:1 (context b) so the snapshot will have the sa me field of view as preview. also copy to snapshot x size register r170:1 (contex t a) or r164 (context b) for largest snapshot. bits 15:12 reserved. mask off these bits be fore performing the above copy operation. r174:1?0x1ae - reducer zoom step size (r/w) default 0x0504 description zoom step sizes. should be a multiple of the aspect ratio 5:4 fo r sxga or 4:3 vga or 11:9 for cif. bits 15:8 zoom step size in x. bits 7:0 zoom step size in y. r175:1?0x1af - reducer zoom control (r/w) default 0x0010 description resize interpolation and zoom control. bit 9 starts automatic ?zoom out? in step sizes defined in r174:1. bit 8 starts automatic ?zoom in? in step sizes defined in r174:1. bit 6 reserved. bit 5 reserved. bit 4 reserved. bit 3 auto switch to classic interp olation at full resolution. bit 1 reserved. bit 0 reserved. r179:1?0x1b3 - global clock control (r/w) default 0x0002 description configures assorted as pects of the clock controller. bits 15:2 not used. bit 1 tri-states pins in standby mode. bit 0 soc soft standby. r200:1?0x1c8 - global context control (r/w) default 0x0000 description defines sensor and colorpipe context for cu rrent frame. registers r200:0, r2 00:1, and r200:2 are shadows of each other. see description in r200:2. it is recommended that all updates to r200:n are handled by means of a write to r200:2. bit 15:0 see r200:2[15:0]. r226:1?0x1e2 - effects mode (r/w) default 0x7000 description this register specifies which of several special effects to apply to each pixel passing through the pixel pipe. bits 15:8 solarization threshold. bits 2:0 specification of the effects mode. ?000? ? no effect (pixels pass through unchanged). ?001? ? monochrome (chrom as set to 0). ?010? ? sepia (chromas set to the value in the effects sepia register). ?011? ? negative (all color channels inverted). ?100? ? solarize (luma conditionally inverted). ?101? ? solarize2 (luma conditionally inverted, chromas inverted when luma inverted). table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 29 ?2004 micron technology, inc. all rights reserved. r227:1?0x1e3 - effects sepia (r/w) default 0xb023 description this register specifie s the chroma values for the sepia effect. in sepia mode, the chroma values of each pixel are set to this value. by defa ult, this register cont ains a brownish color, but it ca n be set to an arbitrary color. bit 15 sign of cb. bits 14:8 magnitude of cb in 0.7 fixed point. bit 7 sign of cr. bits 6:0 magnitude of cr in 0.7 fixed point. r240:1?0x1f0 - page map (r/w) default 0x0000 description this register specifies the register ad dress page for the two-wire interface protocol. bits 2:0 page address: ?000? ? sensor address page ?001? ? colorpipe address page ?010? ? camera control address page r241:1?0x1f1 - byte-wise address (r/w) default n/a description special address to perform 8-bit reads and writes to the sensor. for additional information, see ?two-wire serial interface sample? on page 57 and ?appendix a? on page 56. table 9: colorpipe regist er description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 30 ?2004 micron technology, inc. all rights reserved. table 10: camera contro l register description r38:2?0x226 - auto exposure window horizontal boundaries (r/w) default 0x8000 description this register specif ies the left and right bo undaries of the window used by the auto exposure measurement engine. the values programmed in th e registers are the fractional percentage, where 128 (decimal) is the right-most edge of the frame, 64 (decimal) is the middle of the frame, and 0 is the left-most edge of the frame. bits 15:8 right window boundary. bits 7:0 left window boundary. r39:2?0x227 - auto exposure window vertical boundaries (r/w) default 0x8008 description this register specifies the to p and bottom boundaries of the window used by the auto exposure measurement engine. the values programmed in th e registers are the fractional percentage, where 128 (decimal) is the bottom edge of the frame, 64 (decim al) is the middle of the frame, an d 0 is the top edge of the frame. bits 15:8 bottom window boundary. bits 7:0 top window boundary. r43:2?0x22b - auto exposure center window horizontal boundaries (r/w) default 0x6020 description this register specif ies the left and right bo undaries of the window used by the auto exposure measurement engine in backlight comp ensation mode. the values programmed in the registers are the fractional percentage, where 128 (decimal) is th e right-most edge of the frame, 64 (d ecimal) is the middle of the frame, and 0 is the left-most edge of the frame. bits 15:8 right window boundary. bits 7:0 left window boundary. r44:2?0x22c - auto exposure center window vertical boundaries (r/w) default 0x6020 description this register specifies the to p and bottom boundaries of the window used by the auto exposure measurement engine in backlight comp ensation mode. the values programmed in the registers are the fractional percentage, where 128 (decimal) is th e bottom edge of the frame , 64 (decimal) is the middle of the frame, and ?0? is the top edge of the frame. bits 15:8 bottom window boundary. bits 7:0 top window boundary. r45:2?0x22d - awb window boundaries (r/w) default 0xf0a0 description this register specifies the boundaries of the window used by the awb measurement engine. essentially, it describes the awb measurement window in terms relative to the size of the image?horizontally, in units of 1/10ths of the width of the image; vertically, in units of 1/16 of the height of th e image. so although the positioning is highly quantized, the window remains roughly in place as the reso lution changes. bits 15:12 bottom window boundary (in units of blocks). bits 11:8 top window boundary (in units of blocks). bits 7:4 right window boundary (in units of 2 blocks). bits 3:0 left window boundary (in units of 2 blocks). r46:2?0x22e - auto exposure target and precision control (r/w) default 0x0c4a description this register specif ies the luma target of the auto exposure algorithm and the size of the window/range around the target in which no auto exposure adjustment is made. this wi ndow is centered on target, but the value programmed in the register is 1/2 of the window size. bits 15:8 half-size of the auto ex posure stability window/range. bits 7:0 luma value of the auto exposure target.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 31 ?2004 micron technology, inc. all rights reserved. r47:2?0x22f - auto exposure speed a nd sensitivity control?context a (r/w) default 0xdf20 description this register specifies the speed and sensitivity to change s of auto exposure in context a. bit 15 reserved. bit 14 reserved. bits 13:12 reserved. bit 11 reserved. bit 10 reserved. bit 9 reserved. bits 8:6 factor of reduction of the difference between current luma and target luma. in one adjustment auto exposure advances from current luma to target as follows: ?000? ? 1/4 way going down, 1/8 going up. ?001? ? 1/4 way in both directions. ?010? ? 1/2 way in both directions. ?011? ? 1/2 way going down, 1/4 going up. ?100? ? all the way in both direct ions (fast adaptation!). ?101? ? 3/4 way in both directions. ?110? ? 7/8 way in both directions. ?111? ? reserved. currently the same as ?100? bit 5 reserved bits 4:3 auto exposure luma is updated every n frames, where n is given by this field. bits 2:0 hysteresis control via time-avera ged smoothing of luma data. luma measurements for auto exposure are time- averaged as follows: ?000? ? auto exposure luma = current luma. ?001? ? auto exposure luma = 1/2 curr ent luma + 1/2 buffered value. ?010? ? auto exposure luma = 1/4 curr ent luma + 3/4 buffered value. ?011? ? auto exposure luma = 1/8 curr ent luma + 7/8 buffered value. ?100? ? auto exposure luma = 1/16 curr ent luma + 15/16 buffered value. ?101? ? auto exposure luma = 1/32 curr ent luma + 31/32 buffered value. ?110? ? auto exposure luma = 1/64 curr ent luma + 63/64 buffered value. ?111? ? auto exposure luma = 1/128 curre nt luma + 127/128 buffered value. r91:2?0x25b - flicker control (r/w) default 0x0002 description primary fl icker control register. bit 15 (read only) 50hz/60hz detected. 0: 50hz detected. 1: 60hz detected. bit 2 reserved bit 1 when in ?manual? flicker mode (r91:2[0] = 1), defines which flicker frequency to avoid. 0: forces 50hz detection. 1: forces 60hz detection. bit 0 0: auto flicker detection. 1: manual mode. r98:2?0x262 - auto exposure digital gains monitor (r/w*) default n/a description these digital gains are applied within the ifp; they are independent of the imager gains. bits 15:8 post-lens-correction di gital gain (*writable if auto exposure is disabled). bits 7:0 pre-lens-correction digital gain (* writable if auto exposure is disabled). table 10: camera control re gister description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 32 ?2004 micron technology, inc. all rights reserved. r103:2?0x267 - auto exposure digital gain limits (r/w) default 0x4010 description this register specif ies the upper limits of the digital gains used by the auto exposure algorithm. the values programmed to this register are 16 ti mes the absolute gain values. the va lue of 16 represents the gain 1.0. bits 15:8 maximum limi t on post-lens-correction digital gain. bits 7:0 maximum limit on pre- lens-correction digital gain. r156:2?0x29c - auto exposure speed and sensitivity control?context b (r/w) default 0xdf20 description this register specifies the speed and sensitivity to auto exposure changes in context b. bit 15 reserved. bit 14 reserved. bits 13:12 reserved. bit 11 reserved. bit 10 reserved. bit 9 reserved. bits 8:6 factor of reduction of the difference between cu rrent luma and target luma . in one adjustment, auto exposure advances from curren t luma to target as follows: ?000? ? 1/4 way going down, 1/8 going up. ?001? ? 1/4 way in both directions. ?010? ? 1/2 way in both directions. ?011? ? 1/2 way going down, 1/4 going up. ?100? ? all the way in both direct ions (fast adaptation!). ?101? ? 3/4 way in both directions. ?110? ? 7/8 way in both directions. ?111? ? reserved. currently the same as ?100.? bit 5 reserved. bits 4:3 auto exposure luma is updated every n frames, where n is given by this field. bits 2:0 hysteresis control via time-avera ged smoothing of luma data. luma measurements for auto exposure are time- averaged as follows: ?000? ? auto exposure luma = current luma. ?001? ? auto exposure luma = 1/2 curr ent luma + 1/2 buffered value. ?010? ? auto exposure luma = 1/4 curr ent luma + 3/4 buffered value. ?011? ? auto exposure luma = 1/8 curr ent luma + 7/8 buffered value. ?100? ? auto exposure luma = 1/16 curr ent luma + 15/16 buffered value. ?101? ? auto exposure luma = 1/32 curr ent luma + 31/32 buffered value. ?110? ? auto exposure luma = 1/64 curr ent luma + 63/64 buffered value. ?111? ? auto exposure luma = 1/128 curre nt luma + 127/128 buffered value. r180:2?reserved r200:2?0x2c8 - global context control (r/w) default 0x0000 description defines sensor and colorpipe context for current frame. context a is typi cally used to define preview or viewfinder mode, while context b is typically used for snapshots. the bits of this register directly control the respective functions, so care must be taken when writing to this regi ster if a bad frame is to be avoided during the context switch. bit 15 controls assertion of sensor restart on update of gl obal context control register. this helps ensure that the very next frame is generated with the new context (a problem with regard to ex posure due to the rolling shutter). this bit is automatically cl eared once the restart has occurred. 0: do not restart sensor. 1: restart sensor. table 10: camera control re gister description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 33 ?2004 micron technology, inc. all rights reserved. note: registers marked ?(r/w*)?are normally read -only (r/o) registers, except under special circumstanc es (detailed in the reg- ister description), when some or all bits of the register become read-writeable (r/w). bit 14 reserved. bit 13 reserved. bit 12 defect correction co ntext. see r76:1 and r77:1. 0: context a 1: context b bit 11 reserved. bit 10 resize/zoom context. sw itch resize/zoom contexts: 0: context a 1: context b bit 9 output format control 2 co ntext. see r58:1 and r155:1. 0: context a 1: context b bit 8 gamma table context. 0: context a 1: context b bit 7 arm xenon flash. bit 6 blanking control. this is primarily for use by the internal sequencer when taking automated (e.g., flash) snapshots. setting this bit stops frames from being sent over the bt656 ex ternal pixel interface. this is useful for ensuring that the desired frame during a snapshot sequence is the only frame captured by the host. 0: do not blank frames to host. 1: blank frames to host bit 5 reserved. bit 4 reserved. bit 3 sensor read mode context (skip mo de, power mode, see r33:0 and r32:0. 0: context a 1: context b bit 2 led flash on: 0: turn off led flash 1: turn on led flash bit 1 vertical blanking context: 0: context a 1: context b bit 0 horizontal blanking context: 0: context a 1: context b r240:2?0x2f0 - page map (r/w) default 0x0000 description this register specifie s the register address page for the two wire interface protocol. bits 2:0 page address: ?000? ? sensor address page. ?001? ? colorpipe address page. ?010? ? camera control address page. r241:2?0x2f1 - byte-wise address (r/w) default n/a description special address to perform 8-bit reads and writes to the sensor. for additional inform ation, see ?two-wire serial interface sample? on page 57 and ?appendix a? on page 56. table 10: camera control re gister description (continued)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 34 ?2004 micron technology, inc. all rights reserved. sensor core overview the sensor consists of a pixel array of 1,316 x 1,048 total, an analog readout chain, 10-bit adc with pro- grammable gain and black of fset, and timing and con- trol. figure 5: sensor core block diagram pixel data format pixel array structure the MT9M111 sensor core pixel array is configured as 1,316 columns by 1,048 rows (shown in figure 6). the first 24 columns and the first 8 rows of pixels are optically black, and can be used to monitor the black level. the last 3 columns and the last 7 rows of pixels also are optically black. the black row data is used internally for the automati c black level adjustment. however, the first 8 black rows can also be read out by setting the sensor to raw data output mode (reg0x022). there are 1,289 columns by 1,033 rows of optically-active pixels that provide a 4-pixel boundary around the sxga (1,280 x 1,024) image to avoid boundary effects during color interpolation and cor- rection. the additional active column and additional active row are used to enable horizontally and verti- cally mirrored readout to start on the same color pixel. figure 6: pixel array description the MT9M111 sensor core uses an rgb bayer color pattern, shown in figure 7. the even-numbered rows contain green and red color pixels, and odd numbered rows contain blue and green color pixels. even num- bered columns contain green and blue color pixels; odd-numbered columns contain red and green color pixels. because there are odd numbers of rows and columns, the color order can be preserved during mir- rored readout. figure 7: pixel color pattern detail (top right corner) communication bus to ifp 10-bit data to ifp sync signals clock control register analog processing active pixel sensor (aps) array timing and control adc (1315, 1047) 26 black columns 7 black rows 8 black rows (0, 0) 1 black column sxga (1,280 x 1,024) + 4-pixel boundary for color correction + additional active column + additional active row = 1,289 x 1,033 active pixels black pixels column readout direction . . . ... row readout direction g b g b g b r g r g r g g b g b g b r g r g r g g b g b g b r g r g r g g b g b g b pixel (26, 8)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 35 ?2004 micron technology, inc. all rights reserved. output data format the mt9m011 sensor core image data is read out in a progressive scan. valid image data is surrounded by horizontal blanking and ve rtical blanking, shown in figure 8. line_valid is high during the shaded region of the figure. frame_valid timing is described in ?appendix a? on page 56. figure 8: spatial illustration of image readout p 0,0 p 0,1 p 0,2 .....................................p 0,n-1 p 0,n p 1,0 p 1,1 p 1,2 .....................................p 1,n-1 p 1,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 p m-1,0 p m-1,1 .....................................p m-1,n-1 p m-1,n p m,0 p m,1 .....................................p m,n-1 p m,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 valid image horizontal blanking vertical blanking vertical/horizontal blanking
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 36 ?2004 micron technology, inc. all rights reserved. sensor core register list table 11: sensor registers (address page 0) register# dec (hex) register name data format default value dec (hex) 0 (0x00) chip version 0001 0100 0011 1010 (lsb) 5178 (0x143a) 1 (0x01) row start 0000 0ddd dddd dddd 12 (0x000c) 2 (0x02) column start 0000 0ddd dddd dddd 30 (0x001e) 3 (0x03) window height 0000 0 ddd dddd dddd 1024 (0x0400) 4 (0x04) window width 0000 0ddd dddd dddd 1280 (0x0500) 5 (0x05) horizontal blanking?context b 00dd dddd dddd dddd 388 (0x0184) 6 (0x06) vertical blanking?context b 0ddd dddd dddd dddd 42 (0x002a) 7 (0x07) horizontal blanking?context a 00dd dddd dddd dddd 190 (0x00be) 8 (0x08) vertical blanking?context a 0ddd dddd dddd dddd 17 (0x0011) 9 (0x09) shutter width dddd dddd dddd dddd 537 (0x0219) 10 (0x0a) row speed ddd0 000d dddd dddd 17 (0x0011) 11 (0x0b) extra delay 00dd dddd dddd dddd 0 (0x0000) 12 (0x0c) shutter delay 00dd dddd dddd dddd 0 (0x0000) 13 (0x0d) reset d000 00dd 00dd dddd 8 (0x0008) 32 (0x20) read mode?context b dd0 0 0ddd dddd dddd 768 (0x0300) 33 (0x21) read mode?context a 0 000 0d00 0000 dd00 1036 (0x040c) 34 (0x22) reserved ? 297 (0x0129) 35 (0x23) flash control ??dd d ddd dddd dddd 1544 (0x0608) 36 (0x24) reserved ? 32875 (0x806b) 43 (0x2b) green1 gain 0000 0ddd dddd dddd 32 (0x0020) 44 (0x2c) blue gain 0000 0ddd dddd dddd 32 (0x0020) 45 (0x2d) red gain 0000 0ddd dddd dddd 32 (0x0020) 46 (0x2e) green2 gain 0000 0ddd dddd dddd 32 (0x0020) 47 (0x2f) global gain 0000 0ddd dddd dddd 32 (0x0020) 48 (0x30) reserved ? 1066 (0x042a) 49 (0x31) reserved ? 7168 (0x1c00) 50 (0x32) reserved ? 0 (0x0000) 51 (0x33) reserved ? 841 (0x0349) 52 (0x34) reserved ? 49177 (0xc019) 54 (0x36) reserved ? 61680 (0xf0f0) 55 (0x37) reserved ? 0 (0x0000) 59 (0x3b) reserved ? 33 (0x0021) 60 (0x3c) reserved ? 6688 (0x1a20) 61 (0x3d) reserved ? 8222 (0x201e) 62 (0x3e) reserved ? 8224 (0x2020) 63 (0x3f) reserved ? 8224 (0x2020) 64 (0x40) reserved ? 8220 (0x201c) 65 (0x41) reserved ? 215 (0x00d7) 66 (0x42) reserved ? 1911 (0x0777) 89 (0x59) reserved ? 12 (0x000c) 90 (0x5a) reserved ? 49167 (0xc00f) 91 (0x5b) reserved ? n/a
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 37 ?2004 micron technology, inc. all rights reserved. 92 (0x5c) reserved ? n/a 93 (0x5d) reserved ? n/a 94 (0x5e) reserved ? n/a 95 (0x5f) reserved ? 8989 (0x231d) 96 (0x60) reserved ? 128 (0x0080) 97 (0x61) reserved ? 0 (0x0000) 98 (0x62) reserved ? 0 (0x0000) 99 (0x63) reserved ? 0 (0x0000) 100 (0x64) reserved ? 0 (0x0000) 101 (0x65) reserved ? 0 (0x0000) 112 (0x70) reserved ? 31498 (0x7b0a) 113 (0x71) reserved ? 31498 (0x7b0a) 114 (0x72) reserved ? 6414 (0x190e) 115 (0x73) reserved ? 6159 (0x180f) 116 (0x74) reserved ? 22322 (0x5732) 117 (0x75) reserved ? 22068 (0x5634) 118 (0x76) reserved ? 29493 (0x7335) 119 (0x77) reserved ? 12306 (0x3012) 120 (0x78) reserved ? 30978 (0x7902) 121 (0x79) reserved ? 29958 (0x7506) 122 (0x7a) reserved ? 30474 (0x770a) 123 (0x7b) reserved ? 30729 (0x7809) 124 (0x7c) reserved ? 32006 (0x7d06) 125 (0x7d) reserved ? 12560 (0x3110) 126 (0x7e) reserved ? 126 (0x007e) 128 (0x80) reserved ? 127 (0x007f) 129 (0x81) reserved ? 127 (0x007f) 130 (0x82) reserved ? 22282 (0x570a) 131 (0x83) reserved ? 22539 (0x580b) 132 (0x84) reserved ? 18188 (0x470c) 133 (0x85) reserved ? 18446 (0x480e) 134 (0x86) reserved ? 23298 (0x5b02) 135 (0x87) reserved ? 92 (0x005c) 200 (0xc8) context control d 000 0000 d000 dddd 0 (0x0000) 240 (0xf0) page map 0000 0000 0000 0ddd 0 (0x0000) 241 (0xf1) byte-wise address reserved reserved 245 (0xf5) reserved ? 2047 (0x07ff) 246 (0xf6) reserved ? 2047 (0x07ff) 247 (0xf7) reserved ? 0 (0x0000) 248 (0xf8) reserved ? 0 (0x0000) 249 (0xf9) reserved ? 124 (0x007c) 250 (0xfa) reserved ? 0 (0x0000) 251 (0xfb) reserved ? 0 (0x0000) 252 (0xfc) reserved ? 0 (0x0000) 253 (0xfd) reserved ? 0 (0x0000) table 11: sensor registers (address page 0) (continued) register# dec (hex) register name data format default value dec (hex)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 38 ?2004 micron technology, inc. all rights reserved. note: data format key: 0 = ?don't care? bit d = r/w bit ? = r/o bit. the exceptions: r0:0 and r255: 0, which are hardwired r/o binary values. 255 (0xff) chip version 0001 0100 0011 1010 5178 (0x143a) table 11: sensor registers (address page 0) (continued) register# dec (hex) register name data format default value dec (hex)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 39 ?2004 micron technology, inc. all rights reserved. sensor core regist er descriptions table 12: sensor core register descriptions bit field description default (hex) synced to frame start bad frame read/ write r0:0?0x000 - chip version (r/o) bits 15:0 hardwired read-only. 0x143a r r1:0?0x001 - row start bits 10:0 row start the first row to be read out (not counting dark rows that may be read). to window the image down, set this register to the starting y value. setting a value less than 8 is not recommended since the dark rows should be read using reg0x022. 0xc y ym w r2:0?0x002 - column start bits 10:0 col start the first column to be read ou t (not counting dark columns that may be read). to wind ow the image down, set this register to the starting x value. setting a value below 0x18 is not recommended since readout of dark columns should be controlled by reg0x022. 0x1e y ym w r3:0?0x003 - window height bits 10:0 window height number of rows in the image to be read out (not counting dark rows or border rows that may be read). 0x400 y ym w r4:0?0x004 - window width bits 10:0 window width number of columns in image to be read out (not counting dark columns or border columns that may be read). 0x500 y ym w r5:0?0x005 - horizontal blanking?context b bits 10:0 horizontal blanking b number of blank colu mns in a row when context b is chosen (bit 0, reg0x0c8 = 1). if set smaller than the minimum value, the minimum value is used. with default settings, the minimum horizontal blanking is 202 columns in full-power readout mode and 114 columns in low-power readout mode. 0x184 y ym w r6:0?0x006 - vertical blanking?context b bits 14:0 vertical blanking b number of blank rows in a frame when context b is chosen (bit 1, reg0x0c8 = 1). this number must be equal to or larger than the number of dark rows read out in a frame specified by reg0x022. 0x2a y n w r7:0?0x007 - horizontal blanking?context a bits 10:0 horizontal blanking a number of blank colu mns in a row when context a is chosen (bit 0, reg0x0c8 = 0). the ex tra columns are added at the beginning of a row. if set smal ler than the minimum value, the minimum value is used. with default settings, the minimum horizontal blan king is 202 columns in full-power readout mode and 114 columns in low-power readout mode. 0xbe y ym w r8:0?0x008 - vertical blanking?context a
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 40 ?2004 micron technology, inc. all rights reserved. bits 14:0 vertical blanking a number of blank rows in a fr ame when context a is chosen (bit 1, reg0x0c8 = 1). this numb er must be equal to or larger than the number of dark rows r ead out in a frame specified by reg0x022. 0x11 y n w r9:0?0x009 - shutter width bits 15:0 shutter width integration time in number of rows. in addition to this register, the shutter delay regi ster (reg0x0c) an d the overhead time influences the integration time for a given row time. 0x219 y n w r10:0?0x00a - row speed bits 15:13 reserved. ???? bit 8 invert pixel clock invert pixel clock. when set, line_valid, frame_valid, and data_out are set to the falling edge of pixclk. when clear, they are set to the rising edge if there is no pixel clock delay. 0x0 n 0 w bits 7:4 delay pixel clock delay pixclk in half-master-cloc k cycles. when set, the pixel clock can be delayed in increments of half-master- clock cycles compared to the synchronization of frame_valid, line_valid, and data_out. 0x1 n 0 w bits 3:0 pixel clock speed pixel clock period in master cl ocks when full -power readout mode is used (reg0x020 /0x021, bit 10 = 0). in this case, the adc clock has twice the cl ock period. if low-power readout mode is used, the pixel clock period is automatically doubled, so the adc clock period remains the same for one programmed register value. the value ?0? is not allowed, and ?1? is used instead. 0x1 y ym w r11:0?0x00b - extra delay bits 13:0 extra delay extra blanking inserted between frames specified in pixel clocks. can be used to get a more exact frame rate. for integration times less than a frame, however, it might affect the integration times for parts of the image. 0x0 y 0 w r12:0?0x00c - shutter delay bits 10:0 shutter delay the amount of time from the end of the sampling sequence to the beginning of the pixel rese t sequence. this variable is automatically halved in low-pow er readout mode, so the time in use remains the same. this register has an upper value defined by the fact that the re set needs to finish prior to readout of that row to prevent changes in the row time. 0x0 y n w r13:0?0x00d - reset bit 15 synchronize changes 0: normal operation, updates ch anges to registers that affect image brightness at the next frame boundary (integration time, integration delay, gain, ho rizontal blanki ng and vertical blanking, window size, row/co lumn skip, or row mirror. 1: do not update any changes to these settings until this bit is returned to ?0.? all registers th at are frame synchronized are affected by this bit setting. 0x0 n 0 w bit 9 restart bad frames when set, a forced restart occurs when a bad frame is detected. this can shorten the delay when waiting for a good frame because the delay when ma sking out a bad frame is the integration time rather th an the full frame time. 0x0 n 0 w table 12: sensor core register descriptions (continued) bit field description default (hex) synced to frame start bad frame read/ write
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 41 ?2004 micron technology, inc. all rights reserved. bit 8 show bad frames 0: only output good frames (default) a bad frame is defined as the first frame follow ing a change to: window size or position, horizontal blanking, pixel clock speed, zoom, row or colu mn skip, or mirroring. 1: output all frames (including bad frames) 0x0 n 0 w bit 5 reset soc this reset signal is fed directly to the soc part of the chip, and has no functionality in a stand-alone sensor. 0x0 n 0 w bit 4 output disable when set, the output pins are tri-stated. 0x0 n 0 w bit 3 chip enable 0: stop sensor readout. 1: normal operation. when this is returned to ?1, ? sensor readout restarts and begins resetting the starting row in a new frame. to reduce the digital power, the master clock to the sensor can be disabled or the standby pin can be used. 0x1 n ym w bit 2 analog standby 0: normal operation (default) 1: disable analog circuitry. whenever this bit is set to ?1? th e chip enable bit (bit 3) should be set to ?0.? 0x0 n ym w bit 1 restart setting this bit causes the sens or to abandon the current frame and start resetting the first row. the delay before the first valid frame is read out equals the integration time. this bit always reads ?0.? 0x0 n ym w bit 0 reset setting this bit puts the sensor in reset mode; this sets the sensor to its default power-up state. clearing this bit resumes normal operation. 0x0 n ym w r32:0?0x020 - read mode?context b bit 15 xor line valid 0: line_valid determined by bit 9. ineffective if ?continuous? line_valid is set. 1: line_valid = continuous line_valid xor frame_valid. 0x0 n 0 w bit 14 continuous line valid 0: normal line_valid (default, no line valid during vertical blanking). 1: ?continuous? line_valid (continue producing line_valid during vertical blanking). 0x0 n 0 w bit 10 power readout mode? context b when read mode context b is selected (bit 3, reg0x0c8 = 1): 0: full-power readout mo de, maximum readout speed. 1: low-power readout mode. ma ximum readout frequency is now half of the master cloc k, and the pixel clock is automatically adjusted as desc ribed for the pixel clock speed register. 0x0 y ym w bit 9 show border this bit indicates whet her to show the border enabled by bit 8. when bit 8 is 0, this bit has no meaning. when bit 8 is 1, this bit decides whether the border pixels should be treated as extra active pixels (1) or extra blanking pixels (0). 0x1 n 0 w bit 8 over sized when this bit is set, a 4-pixe l border is output around the active image array independent of readout mode (skip, zoom, mirror, etc.). setting this bi t therefore adds eight to the numbers of rows and columns in the frame. 0x1 y ym w bits 7:6 reserved. 0x0 y ym w table 12: sensor core register descriptions (continued) bit field description default (hex) synced to frame start bad frame read/ write
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 42 ?2004 micron technology, inc. all rights reserved. bit 5 column skip 4x 0: normal readout. 1: readout two columns, and th en skip six co lumns (as with rows). 0x0 y ym w bit 4 row skip 4x 0: normal readout. 1:readout two rows, and then skip six rows (i.e., row 8, row 9, row 16, row 17?). 0x0 y ym w bit 3 column skip 2x ?context b when read mode context b is selected (bit 3, reg0x0c8 = 1): 0: normal readout. 1: readout two columns, and th en skip two columns (as with rows). 0x0 y ym w bit 2 row skip 2x? context b when read mode context b is selected (bit 3, reg0x0c8 = 1): 0: normal readout. 1: readout two rows, then skip two rows (i.e., row 8, row 9, row 12, row 13?). 0x0 y ym w bit 1 mirror columns readout columns from right to left (mirrored). when set, column readout starts from column (col start + col size) and continues down to (col start + 1) . when clear, readout starts at col start and continues to (col start + col size - 1). this ensures that the starting color is maintained. 0x0 y ym w bit 0 mirror rows readout rows from bottom to to p (upside down). when set, row readout starts from row (row start + row size) and continues down to (row start + 1). when clear, readout starts at row start and continues to (r ow start + row size - 1). this ensures that the startin g color is maintained. 0x0 y ym w r33:0?0x021 - read mode?context a bit 10 power readout mode? context a when read mode context a is selected (bit 3, reg0x0c8 = 0): 0: full-power readout mo de, maximum readout speed. 1: low-power readout mode. ma ximum readout frequency is now half of the master cloc k, and the pixel clock is automatically adjusted as desc ribed for the pixel clock speed register. 0x1 y ym w bit 3 column skip 2x ?context a when read mode context a is selected (bit 3, reg0x0c8 = 0): 0: normal readout. 1: readout two columns, and th en skip two columns (as with rows). 0x1 y ym w bit 2 row skip 2x? context a when read mode context a is selected (bit 3, reg0x0c8 = 0): 0: normal readout. 1: readout two rows, and then sk ip two rows (i.e., row 8, row 9, row 12, row 13?). 0x1 y ym w r35:0?0x023 - flash control bit 15 flash strobe read-only bit that indicates whether the flash_strobe pin is enabled. 0x0 0 0 r bit 14 reserved. ???? bit 13 xenon flash enable xenon flash. when set, the flash_strobe output pin is pulsed high for the programm ed period during vertical blanking. this is ac hieved by keeping the integration time equal to one frame an d the pulse width less than the vertical blanking time. 0x0 y n w bits 12:11 frame delay delay of the flash pulse measured in frames. 0x0 n n w table 12: sensor core register descriptions (continued) bit field description default (hex) synced to frame start bad frame read/ write
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 43 ?2004 micron technology, inc. all rights reserved. bit 10 end of reset 0: in xenon mode, the flash should be enabled after the readout of a frame. 1: in xenon mode, the flash sh ould be triggered after the resetting of a frame. 0x1 n n w bit 9 every frame 0: flash should be enabled for one frame only. 1: flash should be enabled every frame. 0x1 n n w bit 8 led flash enables led flash. when set, the flash_strobe goes on prior to the start of a frame reset. when disabled, the flash_strobe remains high until readout of the current frame completes. 0x0 y y w bits 7:0 xenon count length of flash_strobe pulse wh en xenon flash is enabled. the value specifies th e length in 1,024 master clock cycle increments. 0x08 n n w r43:0?0x02b - green1 gain bits 6:0 initial gain initial gain = bits (6:0) x 0.03125. 0x20 y n w bits 8:7 analog gain analog gain = (bit 8 + 1) x (bit 7 + 1) x initial gain (each bit gives 2x gain). 0x0 y n w bits 10:9 digital gain total gain = (bit 9 + 1) x (bit 10 + 1) x analog gain (each bit gives 2x gain). 0x0 y n w r44:0?0x02c - blue gain bits 10:9 digital gain total gain = (bit 9 + 1) x (bit 10 + 1) x analog gain (each bit gives 2x gain). 0x0 y n w bits 8:7 analog gain analog gain = (bit 8 + 1) x (bit 7 + 1) x initial gain (each bit gives 2x gain). 0x0 y n w bits 6:0 initial gain initial gain = bits (6:0) x 0.03125. 0x20 y n w r45:0?0x02d - red gain bits 10:9 digital gain total gain = (bit 9 + 1) x (bit 10 + 1) x analog gain (each bit gives 2x gain). 0x0 y n w bits 8:7 analog gain analog gain = (bit 8 + 1) x (bit 7 + 1) x initial gain (each bit gives 2x gain). 0x0 y n w bits 6:0 initial gain initial gain = bits (6:0) x 0.03125. 0x20 y n w r46:0?0x02e - green2 gain bits 10:9 digital gain total gain = (bit 9 + 1) x (bit 10 + 1) x analog gain threshold (each bit gives 2x gain). 0x0 y n w bits 8:7 analog gain analog gain = (bit 8 + 1) x (bit 7 + 1) x initial gain (each bit gives 2x gain). 0x0 y n w bits 6:0 initial gain initial gain = bits (6:0) x 0.03125. 0x20 y n w r47:0?0x02f - global gain bits 10:0 global gain this register can be used to set all four gains at once. when read, it returns the value stored in reg0x2b. 0x20 y n w r200:0?0x0c8 - context control table 12: sensor core register descriptions (continued) bit field description default (hex) synced to frame start bad frame read/ write
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 44 ?2004 micron technology, inc. all rights reserved. note: notation used in the sensor core register description table: sync?d to frame start 0 = not applicable, e. g., read-only register. n = no. the register value is updated and used immediately. y = yes. the register value is updated at next frame start as lo ng as the synchronize-changes bi t is 0. note also that frame start is defined as when the first dark ro w is read out. by default, this is 8 rows before frame_valid goes high. bad frame a bad frame is a frame where all rows do not have the same integration time, or offsets to the pixel values changed dur- ing the frame. 0 = not applicable, e. g., read-only register. n = no. changing the register va lue does not produce a bad frame. y = yes. changing the register va lue might produce a bad frame. ym = yes, but the bad frame is masked out un less the ?show bad frames? feature is enabled. read/write r?read-only register/bit. w?read/write register/bit. bit 15 restart setting this bit causes the sens or to abandon the current frame and start resetting the first row. same physical register as reg0x00d, bit 1. 0x0 n ym w bit 7 xenon flash enable enable xenon flash. same physi cal register as reg0x023, bit 13. 0x0 y n w bit 3 read mode select 0: use read mode, context a, reg0x021. 1: use read mode, context b, reg0x020. note that bits found only in th e read mode context b register is always taken from that register. 0x0 y ym w bit 2 led flash enable enable led flash. same physical register as reg0x023, bit 8. 0x0 y y w bit 1 vertical blanking select 0: use vertical blanking, context a, reg0x008 1: use vertical blanking, context b, reg0x006. 0x0 y ym w bit 0 horizontal blanking select 0: use horizontal blanki ng, context a, reg0x007. 1: use horizontal blanking, context b, reg0x005. 0x0 y ym w r240:0?0x0f0 - page map bits 2:0 page map page mapping register. must be kep t at 0 to be able to write to/read from sensor. used in the soc to access other pages with registers. 0x0 n 0 w r241:0?0x0f1 - by te-wise address bit 0 byte-wise address special address to perform 8-bit (instead of 16-bit) reads and writes to the sensor. for addi tional information, see ?two- wire serial interface sample? on page 57 and ?appendix a? on page 56. n/a 0 0 0 r255:0?0x0ff - chip version (r/o) bits 15:0 hardwired value. 0x143a r table 12: sensor core register descriptions (continued) bit field description default (hex) synced to frame start bad frame read/ write
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 45 ?2004 micron technology, inc. all rights reserved. sensor read modes and timing this section provides an overview of typical usage modes for the MT9M111. it focuses on two primary configurations: the first is suitable for low-power view- finding, the second for full-resolution snapshots. it also describes mechanisms for switching between these modes. contexts the MT9M111 supports hardware-accelerated con- text switching. a number of parameters have two cop- ies of their setup registers; this allows two ?contexts? to be loaded at any given time. these are referred to as context a and context b. context selection for any sin- gle parameter is determined by the global context control register (gccr, see r200:2). there are copies of this register in each ad dress page. a write to any one of them has the identical effect. however, a read from address page 0 only returns th e subset bits of r200 that are specific to the sensor core. the user can employ contexts for a variety of pur- poses; thus the generic naming convention. one typi- cal usage model is to define context a as ?viewfinder? or ?preview? mode and context b as ?snapshot? mode. the device defaults are configured with this in mind. this mechanism enables the user to have settings for viewfinder and snapshot modes loaded at the same time, and then switch between them with a single write to e.g. r200:2. viewfinder/preview and full-resolu- tion/snapshot modes in the MT9M111, the sensor core supports two pri- mary readout modes: low-power preview mode and full-resolution snapshot mode. low-power preview mode qsxga (640 x 512) images are generated at up to 30 fps. the reduced-size images are generated by skip- ping pixels in the sensor, i.e. decimation. the key sen- sor registers that define this mode are read mode context a register (r33:0) and read mode context b register (r32:0). only certain bits in these registers are context switchable; any bits that do not have multiple contexts are always defined by their values in r32:0. any active sets of these registers are defined by the state of r200:n[3]. on reset, r200:n[3] = 0 selecting r33:0; setups specific to preview are defined by this register. full-resolution snapshot mode sxga (1,280 x 1,024) images are generated at up to 15 fps. this is typically selected by setting r200:n[3] = 1 selecting r32:0 (context b) as the primary read mode register. switching modes typically, switching to full-resolution or snapshot mode is achieved by writing r200:2 = 0x9f0b. this restarts the sensor and sets most contexts to context b. following this write, a read from r200:1 or r200:2 results in 0x1f0b being read. note that the most signif- icant bit (msb) is cleared automatically by the sensor. a read from r200:0 results in 0x000b, as only the lower 4 bits and the restart msb are implemented in the sensor core. clocks the sensor core is a master in the system. the sen- sor core frame rate defines the overall image flow pipe- line frame rate. horizontal and vertical blanking are influenced by the sensor configuration, and are also a function of certain ifp func tions?particularly resize. the relationship of the primary clocks are depicted in figure 9.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 46 ?2004 micron technology, inc. all rights reserved. figure 9: primary sensor core clock relationships the ifp typically generates up to 16 bits per pixel, for example ycbcr or rgb565, but has only an 8-bit port through which to communicate this pixel data. there is no phase locked loop (pll), so the primary input clock (clkin) must be twice the fundamental pixel rate (defined by the sensor pixel clock). to generate sxga images at 15 fps, the sensor core requires a clock in the 24 mhz to 27 mhz range; this is also the fundamental pixel clock rate (sensor pixel clock) for full-power operation. to achieve this pixel rate, clkin must be in the 48 mhz to 54 mhz range. the device defaults assume a 54 mhz clock. minimum clock frequency is 2 mhz. primary operating modes the MT9M111 supports two primary modes of operation with respect to the sensor core that affect pixel rate, frame rate and blanking: full-power readout mode the sensor is in full-resolution mode, generating 1.3 megapixels (sxga = 1,280 x 1,024 + border) for inter- polation. the sxga image fed from the sensor to the colorpipe can be resized in the colorpipe, but the frame rate is still defined by sensor core operation. in full-power readout mode, with full field of view, the frame rate is invariant with the final image size: 10 bits/pixel 1 pixel/clock 16 bits/pixel 1 pixel/clock 16 bits/pixel 0.5 pixel/clock sensor core colorpipe output fifo div by 2 divbyn sensor pixel clock sensor master clock clk_in context typically context b sensor read mode settings no skipping full-power readout, i.e., full data rate sensor pixel clock 27 mhz for 54 mhz master clock: maximum pixel rate of 27 megapixels/s max frame rate for 54 mhz master clock, 15 fps
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 47 ?2004 micron technology, inc. all rights reserved. low-power readout mode running under low-power readout, the sensor is in skip mode, and generates qsxga frames (640 x 512 + border = 336,960 pixels). this full field of view qsxga image can be resized, but only to resolutions smaller than qsxga. the frame rate is defined by the operat- ing mode of the sensor: tuning frame rates actual frame rates can be tuned by adjusting vari- ous sensor parameters. the sensor registers are in page 0, thus the ?:0? after each register address: in the MT9M111, the sensor core adds four border pixels all the way around th e image, taking the active image size to 1,288 x 1,032 in full-power snapshot res- olution, and 648 x 520 when skipping rows in low- power preview resolution. this is achieved through the default settings:  read mode context b: r0x20:0  oversize and show border bits are set by default.  oversize and show border bits are not context switchable, thus their location only in read mode context b. default blanking calculations the MT9M111 default blanking calculations are a function of context, as follows: [reg | reg]: reg low-power readout = context a, typically used for viewfinder reg full power readout = context b, typically used for snapshots context typically context a sensor read mode settings row skip 2x column skip 2x low-power readout maximum data rate is half that of full-power readout sensor pixel clock 13.5 mhz for 54 mhz master clock: maximum pixel rate of 13.5 megapixels/s maximum frame rate for 54 mhz master clock, 30 fps table 13: register address functions register function r0x04:0 window width, typically 1,280 in the MT9M111 r0x03:0 window height, typically 1,024 in the MT9M111 low-power readout mode?context a r0x07:0 horizontal blanking, default is 190 (units of sensor pixel clocks) r0x08:0 vertical blanking, default is 17 (rows including black rows) full-power readout mode?context b r0x05:0 horizontal blanking, default is 388 (units of sensor pixel clocks) r0x06:0 vertical blanking, default is 42 (rows including black rows)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 48 ?2004 micron technology, inc. all rights reserved. note: the line rate (row rate) is the same for both low-power and full-pow er readout modes. this ensures that when switching modes, exposure time does not change; the pre-existing shutter width remains valid. user blanking calculations when calculating blanking for different clock rates, minimum values for horizontal blanking and vertical blanking must be taken into account. table 15 shows minimum values for each register table 14: blanking pa rameter calculations parameter calculation pc_period full-power readout : (2/54)s = 0.0370s sensor pixel clock period low-power readout: (4/54)s = 0.0185s a: active data time (per line): full-power readout : a = 1288 * (2/54)s = 47.704s r0x04:0 + 8 (border) * pc_period low-power readout: a = 648 * (4 / 54)s = 48.000 s q: horizontal blanking: full-power readout : q = 388 * (2/54)s = 14.370s [r0x05:0 | r0x07:0] * pc_period low-power readout: q = 190 * (4/54)s = 14.074s row time = q + a: full-power readout : 62.074s low-power readout: 62.074s p: frame start / end blanking: full-power readout : p = 6 * (2/54)s = 0.222s 6 * pc_period low-power readout: p = 6 * (4 / 54)s = 0.444s v: vertical blanking: full-power readout : v = (42 * 62.074) + (14.370 - 0.444) = 2621.034 s [r0x06:0 | r0x08:0] * (q + a) + (q - 2 * p) low-power readout: v = (17 * 62.074) + (14.074 - 0.888) = 1068.444 s f: total frame time: full-power readout : v = (1032 + 42) * 62.074s = 66667.476s 15 fps (r0x03:0 + [r0x06:0 | r00x08:0]) * (a + q) low-power readout: v = (520 + 17) * 62.074s = 33333.738s 30 fps table 15: user blanking minimum values parameter register minimum horizontal blanking full-power readout (context b): r0x05:0 202 (sensor pixel clocks) low-power readout (c ontext a): r0x07:0 114 (sensor pixel clocks) vertical blanking full-power readout (context b): r0x06:0 5 (rows) low-power readout (context a): r0x08:0 5 (rows)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 49 ?2004 micron technology, inc. all rights reserved. exposure and sensor context switch- ing the MT9M111 incorporates device setup features that prevent changes in sensor context from causing a change in exposure when switching between preview/ viewfinder and full-resolution/snapshot modes. this is achieved by keeping the line rate consistent between modes. exposure defined by the shutter width. this is the number of lines to be reset before starti ng a frame read. if line rate does not change when a mode changes, exposure does not change. switching from context a to b under typical/default settings, the sensor pixel rate doubles when switching from preview (context a) to full-resolution (context b). additionally, the number of pixels to be read per line nearly doubles. this natu- rally keeps the line rates roughly equal. the difference occurs due to border pixels: for soc operation, there are always 8 border pixels regardless of context, thus the number of pixels in each line is not quite doubled. horizontal blanking defined in terms of ?sensor pixel clocks.? the sen- sor pixel clock rate doubles when switching from low- power readout mode (preview context a) to full-power readout mode (full-resolution context b). to maintain the same horizontal blanking time, the value for hori- zontal blanking must double. this is handled by the dual, context-switchable hori zontal blanking registers. switching modes initiate mode switches from preview (context a) to snapshot (context b) during vertical blanking; switch- ing should be accompanied by a sensor restart. be sure r200:0[15] is written as ?1? when changing contexts. switching frequency the user can switch betwee n sensor contexts as fre- quently as necessary (witho ut affecting exposure) with the default values for horizontal blanking and vertical blanking (r5:0?r8:0).usefully, constant switches can occur as often as once per frame. simple snapshots to take a snapshot, simply switch from context a to context b (with restart) for a few frames, then switch back again, capturing one of the context b frames as the snapshot. alternative methods are supported by an internal sequencer. these additional methods are par- ticularly useful for taking flash snapshots.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 50 ?2004 micron technology, inc. all rights reserved. output timing figure 10: vertical timing figure 11: horizontal timing line 0 line 1 linen-3 linen-2 linen-1 line 0 frame_valid line_valid d[7:0] ef db c a no data 10 ff 00 00 80 cb0 y0 cr1 y1 cb3 y3 crn -1 y n ff 00 00 90 pixclk line_valid d[7:0] 10
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 51 ?2004 micron technology, inc. all rights reserved. typical resolutions , modes and timing the parameters in table 16 are illustrated in wave- form diagram figure 10 on page 50. table 20 provides values for these parameters in some common resolu- tions and operating modes. reset, clocks, and standby functional operation power-up reset is asserted/de-asserted on the reset# pin. it is active low. in this reset state, all control registers have the default values. all internal clocks are turned off except for the divided-by-2 clock to the sensor core. soft reset is asserted/de- asserted by the two-wire serial interface program. there are sensor hardmac soft resets and soc soft resets. in soft reset mode, the two-wire serial interface and register ring bus are still running. all control registers are reset using default values. see r13:0. hard standby is assert ed/de-asserted on the standby pin. it is active high. in this hard standby state, all internal clocks are turned off and analog block is in standby mode to save power consumption. (note: following the assertion of hard standby, at least 24 master clock cycles must be delivered to complete the transition to the hard standby state.) soft standby is asserted/de-asserted differently in the sensor page or colorpipe page. the sensor soft standby bit is in r13:0[2]. colorpipe soft standby dis- ables some of the soc clocks, including the pixel clock. this bit is r179:1[0]. the colorpipe should be brought out of standby first via r179:1[0]. the colorpipe soft standby is provided to enable the user to turn off the colorpipe and the sensor indepen- dently. by default, all outputs except s data are disabled during hard standby. this feature can be disabled by setting r179:1[1] = 0. independent control of the out- puts is available either via the oe# pin or r13:0[4]. all outputs are implemented using bidirectional buffers, thus should not be left tri-stated. in dual camera appli- cations, ensure that one camera is driving the bus, or that the bus is pulled to v gnd q or v dd q, even during standby. table 16: blanking definitions designation definition (a) frame_valid (rising ed ge) to line_valid (rising edge) delay (b) line_valid (falling edge) to frame_valid (falling edge) delay (c) line_valid (high/valid) time (d) line_valid (low/horizontal blanking) time (e) frame_valid (high/valid) time (f) frame_valid (low/ver tical blanking) time
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 52 ?2004 micron technology, inc. all rights reserved. electrical specifications note: v dd , v aa , and vaapix must all be at the same potential to avoi d excessive current draw. care must be taken to avoid excessive noise injection in the analog suppli es if all three supplies are tied together. table 17: electrical characte ristics and operating conditions (t a = ambient = 25c) parameter condition min typ max unit i/o digital voltage (v dd q) 1.7v 3.6v v core digital voltage (v dd ) 2.5v 2.8v 3.1v v analog vo ltage (v aa ) 2.5v 2.8v 3.1v v pixel supply voltage (vaapix) 2.5v 2.8v 3.1v v leakage current standby, no clocks 10 a operating temperature measured at junction -30 +70 c table 18: i/o parameters pin parameter definitions condition min typ max unit all outputs load capacitance 30 pf output pin slew 2.8v, 30pf load 0.72 v/ns 2.8v, 5pf load 1.25 v/ns 1.8v, 30pf load 0.34 v/ns 1.8v, 5pf load 0.51 v/ns v oh output high voltage v v ol output low voltage v i oh output high current v dd q = 2.8v, v oh = 2.4v 16 26.5 ma v dd q = 1.8v, v oh = 1.4v 8 15 ma i ol output low current v dd q = 2.8v, v ol = 0.4v 15.9 21.3 ma v dd q = 1.8v, v ol = 0.4v 10.1 16.2 ma i oz tri-state output leakage current all inputs v ih input high voltage v dd q = 2.8v 1.48 v v dd q = 1.8v 0.94 v v il input low voltage v dd q = 2.8v 1.43 v v dd q = 1.8v 0.84 v i in input leakage current -2 2a pin cap pin input capacitance 3.5 pf clkin freq master clock frequency absolute minimum 2 mhz sxga @ 15 fps 48 54 mhz
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 53 ?2004 micron technology, inc. all rights reserved. power consumption table 19: power consumption at 2.8v mode sensor/ m w image flow proc/ m w i/os (10pf)/ m w total m/ m w sxga at 15 fps 90 71 9 170 qsxga at 30 fps 50 36 4 90 qsxga at 15 fps 50 18 2 70 qvga at 30 fps 50 32 1 83
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 54 ?2004 micron technology, inc. all rights reserved. i/o timing by default, the MT9M111 launches pixel data, frame_valid, and line_valid synchronously with the falling edge of pixclk. the expectation is that the user captures data, frame_valid, and line_valid using the rising edge of pixclk. the timings in figure 12 assume that the sense of pixclk is inverted from the default. this is achieved by setting r58:1[9] and r155:[9] = 1. figure 12: i/o timing diagram table 20: i/o timing table signal parameter conditions slow fast unit min max min max clkin tclkin_min_high 7.4 7.4 ns tclkin_min_low 7.4 7.4 ns tclkin_min_period 18.5 18.5 ns pixclk tclkinr_pixclkr 16.5 16.9 7.7 7.9 ns tclkinf_pixclkfl 17.5 17.6 7.9 8.0 ns tpixclk_min_low 50:50, 54 mhz clkin 8.2 9.0 ns tpixclk_min_high 50:50, 54 mhz clkin 9.9 9.3 ns data[7:0] tclkinr_dout 15.7 18.6 7.6 8.6 ns tdout_su 50:50, 54 mhz clkin 8.2 8.6 ns tdout_ho 50:50, 54 mhz clkin 7.4 8.9 ns frame_valid/line_valid tclkinr_fvlv 18.0 21.0 8.8 9.9 ns tfvlv_su 50:50, 54 mhz clkin 5.8 7.3 ns tfvlv_ho 50:50, 54 mhz clkin 9.7 10.1 ns tclkinr_pixclkf tdout_su tdout_ho clkin pixclk data[7:0] frame_valid line_valid tpixclk_min_low tpixclk_min_high tclkin_min_high tfvlv_su tfvlv_ho tclkinr_pixclkr tclkinr_dout tclkinr_fvlv tclkin_min_low tclkin_min_period undefined
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 55 ?2004 micron technology, inc. all rights reserved. figure 13: spectral resp onse chart (preliminary) figure 14: optical center diagram note: figure not to scale. relative spectral response 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 350 450 550 650 750 850 950 1050 wavelength (nm) relative response blue green (b) green (r) red die center (0m, 0m) optical center +15.63m -37.66m + direction - direction + direction - direction first clear pixel (26, 8) last clear pixel (1312,1040)
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 56 ?2004 micron technology, inc. all rights reserved. appendix a serial bus description registers are written to and read from the MT9M111 through the two-wire serial interface bus. the sensor is a serial interface slave and is controlled by the serial clock (sclk). slck is driven by the serial interface mas- ter. data is transferred into and out of the MT9M111 through the serial data (s data ) line. the s data line is pulled up to 2.8v off-chip by a 1.5k ? resistor. either the slave or the master device can pull the s data line down?the two-wire serial interface protocol deter- mines which device is allowed to pull the s data line down at any given time. protocol the two-wire serial interf ace defines several differ- ent transmission codes, as follows: a start bit  the slave device 8-bit address. the s addr pin is used to select between two differe nt addresses in case of conflict with another device. if s addr is low, the slave address is 0x90; if s addr is high, the slave address is 0xba.  an acknowledge or a no-acknowledge bit  an 8-bit message a stop bit. sequence a typical read or write sequence begins with the mas- ter sending a start bit. after the start bit, the master sends the 8-bit slave device address. the last bit of the address determines if the request is a read or a write, where a ?0? indicates a write and a ?1? indicates a read. the slave device acknowledges its address by sending an acknowledge bit back to the master. if the request was a write, the master transfers the 8- bit register address to which a write should take place. the slave sends an acknowledge bit to indicate that the register address has been received. the master then transfers the data, 8 bits at a time, with the slave send- ing an acknowledge bit after each 8 bits. the MT9M111 uses 16-bit data for its internal regis- ters, thus requiring two 8-bit transfers to write to one register. after 16 bits are transferred, the register address is automatically incremented, so that the next 16 bits are written to the next register address. the master stops writing by sending a start or stop bit. a typical read sequence is executed as follows. the master sends the write-mode slave address and 8-bit register address, just as in the write request. the mas- ter then sends a start bit and the read-mode slave address. the master clocks out the register data, 8 bits at a time, and sends an acknowledge bit after each 8- bit transfer. the register address is auto-incremented after every 16 bits is transferred. the data transfer is stopped when the master sends a no-acknowledge bit. bus idle state the bus is idle when both the data and clock lines are high. control of the bus is initiated with a start bit, and the bus is released with a stop bit. only the master can generate the start and stop bits. start bit the start bit is defined as a high-to-low transition of the data line while the clock line is high. stop bit the stop bit is defined as a low-to-high transition of the data line while the clock line is high. slave address the 8-bit address of a two-wire serial interface device consists of seven bits of address and 1 bit of direction. a ?0? in the least significant bit (lsb) of the address indi- cates write mode, and a ?1? indicates read mode. the write address of the sensor is 0xba; the read address is 0xbb. this applies only when the s addr is set high. data bit transfer one data bit is transferred during each clock pulse. the serial interface clock pulse is provided by the mas- ter. the data must be stable during the high period of the two-wire serial interfa ce clock?it can only change when the serial clock is low. data is transferred 8 bits at a time, followed by an acknowledge bit. acknowledge bit the master generates the acknowledge clock pulse. the transmitter (which is the master when writing, or the slave when reading) releases the data line, and the receiver signals an acknowledge bit by pulling the data line low during the acknowledge clock pulse. no-acknowledge bit the no-acknowledge bit is generated when the data line is not pulled down by the receiver during the acknowledge clock pulse. a no-acknowledge bit is used to terminate a read sequence.
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 57 ?2004 micron technology, inc. all rights reserved. two-wire serial interface sample write and read sequences (s addr = 1) 16-bit write sequence a typical write sequence for writing 16 bits to a reg- ister is shown in figure 15. a start bit sent by the mas- ter starts the sequence, followed by the write address. the image sensor sends an acknowledge bit and expects the register address to come first, followed by the 16-bit data. after each 8-bit transfer, the image sensor sends an acknowledge bit. all 16 bits must be written before the register is updated. after 16 bits are transferred, the register address is automatically incre- mented so that the next 16 bits are written to the next register. the master stops writing by sending a start or stop bit. figure 15: write timing to r0x09:0?value 0x0284 16-bit read sequence a typical read sequence is shown in figure 16. the master writes the register address, as in a write sequence. then a start bit and the read address specify that a read is about to occur from the register. the master then clocks out the register data, 8 bits at a time. the master sends an acknowledge bit after each 8-bit transfer. the register address should be incre- mented after every 16 bits is transferred. the data transfer is stopped when the master sends a no- acknowledge bit. figure 16: read timing from r0x09:0; returned value 0x0284 sclk s data 0xba address start stop ack ack ack ack reg 0x09 0000 0010 1000 0100 sclk s data 0xba address start start stop ack ack ack ack nack reg 0x09 0xbb address 0000 0010 1000 0100
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 58 ?2004 micron technology, inc. all rights reserved. 8-bit write sequence to be able to write one byte at a time to the register, a special register address is added. the 8-bit write is started by writing the upper 8 bits to the desired regis- ter, then writing the lower 8 bits to the special register address (r0xf1:0). the register is not updated until all 16 bits have been written. it is not possible to update just half of a register. figure 17 shows a typical sequence for an 8-bit write. the second byte is written to the special register (r0xf1:0). figure 17: write timing to r0x09:0?value 0x0284 8-bit read sequence to read one byte at a time, the same special register address is used for the lower byte. the upper 8 bits are read from the desired register. by following this with a read from the special register (r0xf1:0), the lower 8 bits are accessed (figure 18). the master sets the no- acknowledge bits shown. figure 18: read timing from r0x09:0; returned value 0x0284 two-wire serial bus timing the two-wire serial bus op eration requires certain minimum master clock cycles between transitions. these are specified in the following diagrams in mas- ter clock cycles. sclk s data 0xba address start stop ack ack ack ack reg 0x09 0xba address start ack ack reg 0xf1 0000 0010 1000 0100 3#,+ 3 $!4! x"!!ddress 3tart 3tart !#+ !#+ !#+ .!#+ 2egx x""!ddress  3#,+ 3 $!4! x"!!ddress 3tart 3tart 3top !#+ !#+ !#+ .!#+ 2egx& x""!ddress  ss ss
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 59 ?2004 micron technology, inc. all rights reserved. figure 19: serial ho st interface: start condition timing figure 20: serial ho st interface: stop condition timing note: all timing in maste r clock cycle units. figure 21: serial host interface write note: s data is driven by an off-chip transmitter. figure 22: serial host interface read note: s data is pulled low by the sensor, or allowed to be pulled high by an off-chip pull-up resistor. figure 23: acknowledge signal timing after an 8-bit write to sensor figure 24: acknowledge signal timing after an 8-bit read from sensor note: after a read, the master receiver must pull down s data to acknowledge receipt of data bits. when the read sequence is complete, the master generates a no-acknowledge bit by leaving s data to float high. on the fo llowing cycle, either a start or stop bit can be used. sclk 5 s data 4 3#,+  3$!4!  sclk 4 s data 4 3#,+  3$!4! sclk sensor pulls down sdata pin 6 sdata 3 3#,+ 3ensortri states3$!4!pin turnsoffpulldown  3$!4! 
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 60 ?2004 micron technology, inc. all rights reserved. ? 8000 s. federal way, p.o. box 6, boise, id 83707-0006, tel: 208-368-3900 e-mail: prodmktg@micron.com, internet: http://www .micron.com, customer comment line: 800-932-4992 micron, the m logo, and the micron logo are trademarks of micron technology, inc. all other trademarks are the property of their respective owners. figure 25: 44-b all icsp package note: dimensions are in millimeters min/max or typical where noted. data sheet designation: preliminary this data sheet contains in itial characterization lim- its that are subject to change upon full characteriza- tion of production devices. 3%!4).'0,!.%     /04)#!, #%.4%2   &/22%&%2%.#%/.,9 &/22%&%2%.#%/.,9 #42 0)8%,   "!,,! #/2.%2  #42   #42  #42  490 490    &/22%&%2%.#%/.,9 # , # ,    ! ! "!,,!)$ "!,,! "!,,! 8? $)-%.3)/.3!00,94/ 3/,$%2"!,,30/342%&,/7 4(%02% 2%&,/7$)!-%4%2 )3? %.#!035,!.4%0/89 )-!'%3%.3/2$)% ,)$-!4%2)!,"/2/3),)#!4%',!334()#+.%33 35"342!4%-!4%2)!,0,!34)#,!-).!4% 3/,$%2"!,,-!4%2)!,3n 0b !g/2 3n !g #u 3/,$%2-!3+$%&).%$"!,,0!$3? /04)#!,!2%! -!8)-5-2/4!4)/./&/04)#!,!2%!2%,!4)6%4/0!#+!'%%$'%3? -!8)-5-4),4/&/04)#!,!2%!2%,!4)6%4/0!#+!'%%$'% " ? -!8)-5-4),4/&/04)#!,!2%!2%,!4)6%4/4/0/&#/6%2',!33 ? "
MT9M111 soc megapixel digital image sensor preliminary 09005aef8136743e pdf/09005aef8136761e zip micron technology, inc., reserves the right to change products or specifications without notice. MT9M111__soc1310__2.fm - rev. c 10/04 en 61 ?2004 micron technology, inc. all rights reserved. revision history rev. c, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10/04  added standby to figure 3, typical configuration (connection), on page 9. rev. b, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7/04  updated package diagram.  clarified low-power readout mode. rev. a, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/04  initial release.


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